GE 90-30 PLC - Manual (Page 66)

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3-33 GFK-1084B Chapter 3 Programming Communications Requests
The COMMREQ Status word (CRS word) is returned from the Ethernet Interface to
the CPU immediately if the Command Block contains a syntax error or if the command
is local. For remote commands with no syntax error, it is returned either after the chan-
nel is established successfully and the first transfer has completed or if there is an error
establishing the channel. The location of the CRS word is defined in the Command
Block for the COMMREQ function.
The Detailed Channel Status words (DCS words) are returned to the CPU only by
executing the Retrieve Detailed Channel Status Command. If a channel error is indi-
cated (by the Channel Error bit) after the channel is established, the first word of the
DCS words will contain an error code indicating the cause of the error. The second
word of the DCS words indicates whether the channel is active or idle.
Be aware that the Detailed Channel Status words are updated every time the status
of the channel changes. If, for example, the channel is operating with a fast
repetition period, the status words may change faster than the ladder executes the
COMMREQ to retrieve them. Therefore, some status values may be missed from the
ladder’s point of view.
Description of the Status Data
The errors and status reported in each type of status data are described below.
OK Output of the COMMREQ Function Block
The OK output passes power when the COMMREQ has successfully been deposited
into memory local to the target Ethernet Interface.
FT Output of the COMMREQ Function Block
The FT Output passes power upon the following errors.
H Invalid rack/slot specified. The module at this rack/slot is unable to receive a
COMMREQ.
H Task ID not valid. (Task ID should be set to zero.)
H Data Block length is zero or greater than 128.
H Too many simultaneous active COMMREQs (overloading either the PLC CPU or the
Ethernet Interface).
Status Bits
The status bits normally occupy a single block of memory. The location of this block is
specified during module configuration in the Configuration Software (see Chapter 2 for
details). The first 16 bits of the block (see table below) comprise the LAN Interface Status
(LIS) bits. The next 64 bits comprise the Channel Status bits (2 for each channel). A de-
tailed explanation of the status bits is given following the table.
Note
Unless the “LAN Interface OK” bit is set (bit 16 in the following table),
the other status bits are invalid.