Motorola MVME2400 - Manual (Page 59)

Block Diagram
http://www.mcg.mot.com/literature 3-11
3
Table 3-6. PPC60x Originated Bandwidth Matrix
Transaction
First 2
Cache Lines
First 4
Cache Lines
First 6
Cache Lines
Continuous
Clock
Ratio
Clks
MBytes
Sec
Clks
MBytes
Sec
Clks
MBytes
Sec
Clks/
Line
MBytes
Sec
64-bit Writes 14 381 58 184 108 148 25 107 5:2
64-bit Reads - - - - - - 32.5 82
32-bit Writes 14 381 78 137 148 108 35 76
32-bit Reads - - - - - - 42.5 63
64-bit Writes 14 457 38 337 68 282 15 213 3:2
64-bit Reads - - - - - - 22.5 142
32-bit Writes 14 457 50 256 92 209 21 152
32-bit Reads - - - - - - 28.5 112
64-bit Writes 14 457 67 191 127 151 30 107 3:1
64-bit Reads - - - - - - 36 89
32-bit Writes 14 457 98 131 182 105 42 76
32-bit Reads - - - - - - 48 67
64-bit Writes 14 305 48 178 88 145 20 107 2:1
64-bit Reads - - - - - - 28 76
32-bit Writes 14 305 64 133 120 107 28 76
32-bit Reads - - - - - - 36 59
64-bit Writes 14 305 29 294 49 261 10 213 1:1
64-bit Reads - - - - - - 18 118
32-bit Writes 14 305 37 231 65 197 14 152
32-bit Reads - - - - - - 22 97