Intel 460GX - Manual (Page 194)

LPC/FWH Interface Configuration
11-4 Intel® 460GX Chipset Software Developer’s Manual
11.1.8 ACPI Base Address (Function 0)
Address: 40-43h
Default Value: 00000001h
Attribute: Read/Write
11.1.9 ACPI Enable (Function 0)
Address: 44h
Default Value 00
Attribute: Read/Write
11.1.10 SCI IRQ Routing Control
Address: 45h
Default Value: 00h
Attributes: Read/Write
Bit Description
31:16 Reserved.
15:6 Base Address: Provides the 64 bytes of I/O space.
5:1 Reserved.
0 Resource Indicator: Tied to 1 to indicate I/O space
Bit Description
7:1 Reserved.
0 ACPI Enable: When this bit is set to ‘1’, decode of the I/O range pointed to by the ACPI base
register is enabled, and the ACPI power management Function is enabled. Note that the APM
power management ranges (B2/B3h) are always enabled and are not affected by this bit.
Bit Description
7:3 Reserved.
2:0 SCI IRQ Map: Specifies on which pin the SCI will appear on internally. If not using the APIC,
software must program this register to “000”. This interrupt is not sharable. When this interrupt is
chosen, the corresponding interrupt pin is blocked and the SERIRQ frame entry is blocked. This
interrupt can be shared with a PCI interrupt.
Bits SCI Map
000 IRQ9
001 SCI
010 FEMPTY#
011 IRQ8
100 IRQ0
101 IRQ10
110 IRQ11
111 Reserved