Silicon Laboratories C8051F347 - Manual (Page 127)

Rev. 1.3 127
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
13.7.2. Multiplexed Mode
13.7.2.1.16-bit MOVX: EMI0CF[4:2] = ‘001’, ‘010’, or ‘011’.
Figure 13.8. Multiplexed 16-bit MOVX Timing
P4
P3
P4
ADDR[15:8]
AD[7:0]
P3
P1.7
P1.6
P1.3
P1.7
P1.6
P1.3
T
ACH
T
WDH
T
ACW
T
ACS
T
WDS
ALE
WR
RD
EMIF ADDRESS (8 MSBs) from DPH
EMIF WRITE DATA
EMIF ADDRESS (8 LSBs) from
DPL
T
ALEH
T
ALEL
P4
P3
P4
ADDR[15:8]
AD[7:0]
P3
P1.6
P1.7
P1.3
P1.6
P1.7
P1.3
T
ACH
T
ACW
T
ACS
ALE
RD
WR
EMIF ADDRESS (8 MSBs) from DPH
EMIF ADDRESS (8 LSBs) from
DPL
T
ALEH
T
ALEL T
RDH
T
RDS
EMIF READ DATA
Muxed 16-bit WRITE
Muxed 16-bit READ