Silicon Laboratories C8051F347 - Manual (Page 197)

Rev. 1.3 197
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
Table 17.3. Sources for Hardware Changes to SMB0CN
Bit Set by Hardware When: Cleared by Hardware When:
MASTER
• A START is generated. • A STOP is generated.
• Arbitration is lost.
TXMODE
• START is generated.
• SMB0DAT is written before the start of an
SMBus frame.
• A START is detected.
• Arbitration is lost.
• SMB0DAT is not written before the
start of an SMBus frame.
STA
• A START followed by an address byte is
received.
• Must be cleared by software.
STO
• A STOP is detected while addressed as a
slave.
• Arbitration is lost due to a detected STOP.
• A pending STOP is generated.
ACKRQ
• A byte has been received and an ACK
response value is needed.
• After each ACK cycle.
ARBLOST
• A repeated START is detected as a MASTER
when STA is low (unwanted repeated START).
• SCL is sensed low while attempting to gener-
ate a STOP or repeated START condition.
• SDA is sensed low while transmitting a ‘1’
(excluding ACK bits).
• Each time SI is cleared.
ACK
• The incoming ACK value is low (ACKNOWL-
EDGE).
• The incoming ACK value is high (NOT
ACKNOWLEDGE).
SI
• A START has been generated.
• Lost arbitration.
• A byte has been transmitted and an ACK/
NACK received.
• A byte has been received.
• A START or repeated START followed by a
slave address + R/W has been received.
• A STOP has been received.
• Must be cleared by software.