Silicon Laboratories C8051F347 - Manual (Page 211)

Rev. 1.3 211
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
SFR Definition 18.2. SBUF0: Serial (UART0) Port Data Buffer
Bits7–0: SBUF0[7:0]: Serial Data Buffer Bits 7–0 (MSB-LSB)
This SFR accesses two registers; a transmit shift register and a receive latch register. When
data is written to SBUF0, it goes to the transmit shift register and is held for serial transmis-
sion. Writing a byte to SBUF0 initiates the transmission. A read of SBUF0 returns the con-
tents of the receive latch.
R/W R/W R/W R/W R/W R/W R/W R/W Reset Value
00000000
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
SFR Address: 0x99