Silicon Laboratories C8051F347 - Manual (Page 232)

C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
232 Rev. 1.3
Figure 20.8. SPI Master Timing (CKPHA = 0)
Figure 20.9. SPI Master Timing (CKPHA = 1)
SCK*
T
MCKH
T
MCKL
MOSI
T
MIS
MISO
* SCK is shown for CKPOL = 0. SCK is the opposite polarity for CKPOL = 1.
T
MIH
SCK*
T
MCKH
T
MCKL
MISO
T
MIH
MOSI
* SCK is shown for CKPOL = 0. SCK is the opposite polarity for CKPOL = 1.
T
MIS