Silicon Laboratories C8051F347 - Manual (Page 261)

Rev. 1.3 261
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
22.2.4. Frequency Output Mode
Frequency Output Mode produces a programmable-frequency square wave on the module’s associated
CEXn pin. The capture/compare module high byte holds the number of PCA clocks to count before the out-
put is toggled. The frequency of the square wave is then defined by Equation 22.1.
Equation 22.1. Square Wave Frequency Output
Where F
PCA
is the frequency of the clock selected by the CPS2-0 bits in the PCA mode register, PCA0MD.
The lower byte of the capture/compare module is compared to the PCA counter low byte; on a match,
CEXn is toggled and the offset held in the high byte is added to the matched value in PCA0CPLn. Fre-
quency Output Mode is enabled by setting the ECOMn, TOGn, and PWMn bits in the PCA0CPMn register.
Figure 22.7. PCA Frequency Output Mode
F
CEXn
F
PCA
2 PCA0CPHn

----------------------------------------- =
Note: A value of 0x00 in the PCA0CPHn register is equal to 256 for this equation.
8-bit
Comparator
PCA0L
Enable
PCA Timebase
match
PCA0CPHn 8-bit Adder PCA0CPLn
Adder
Enable
CEXn
Crossbar Port I/O
Toggle
0
1
TOGn
0 0 0 x
PCA0CPMn
P
W
M
1
6
n
E
C
O
M
n
E
C
C
F
n
T
O
G
n
P
W
M
n
C
A
P
P
n
C
A
P
N
n
M
A
T
n
x
ENB
ENB
0
1
Write to
PCA0CPLn
Write to
PCA0CPHn
Reset