Silicon Laboratories C8051F347 - Manual (Page 48)

C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
48 Rev. 1.3
SFR Definition 5.1. AMX0P: AMUX0 Positive Channel Select
Bits7–5: UNUSED. Read = 000b; Write = don’t care.
Bits4–0: AMX0P4–0: AMUX0 Positive Input Selection
R R R R/W R/W R/W R/W R/W Reset Value
- - - AMX0P4 AMX0P3 AMX0P2 AMX0P1 AMX0P0 00000000
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 SFR Address:
0xBB
AMX0P4-0 ADC0 Positive Input
(32-pin Package)
ADC0 Positive Input
(48-pin Package)
00000 P1.0 P2.0
00001 P1.1 P2.1
00010 P1.2 P2.2
00011 P1.3 P2.3
00100 P1.4 P2.5
00101 P1.5 P2.6
00110 P1.6 P3.0
00111 P1.7 P3.1
01000 P2.0 P3.4
01001 P2.1 P3.5
01010 P2.2 P3.7
01011 P2.3 P4.0
01100 P2.4 P4.3
01101 P2.5 P4.4
01110 P2.6 P4.5
01111 P2.7 P4.6
10000 P3.0 RESERVED
10001 P0.0 P0.3
10010 P0.1 P0.4
10011 P0.4 P1.1
10100 P0.5 P1.2
10101 - 11101 RESERVED RESERVED
11110 Temp Sensor Temp Sensor
11111 V
DD
V
DD