Silicon Laboratories C8051F347 - Manual (Page 52)

C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
52 Rev. 1.3
5.4. Programmable Window Detector
The ADC Programmable Window Detector continuously compares the ADC0 conversion results to
user-programmed limits, and notifies the system when a desired condition is detected. This is especially
effective in an interrupt-driven system, saving code space and CPU bandwidth while delivering faster sys-
tem response times. The window detector interrupt flag (AD0WINT in register ADC0CN) can also be used
in polled mode. The ADC0 Greater-Than (ADC0GTH, ADC0GTL) and Less-Than (ADC0LTH, ADC0LTL)
registers hold the comparison values. The window detector flag can be programmed to indicate when mea-
sured data is inside or outside of the user-programmed limits, depending on the contents of the ADC0
Less-Than and ADC0 Greater-Than registers.
The Window Detector registers must be written with the same format (left/right justified, signed/unsigned)
as that of the current ADC configuration (left/right justified, single-ended/differential).
SFR Definition 5.7. ADC0GTH: ADC0 Greater-Than Data High Byte
SFR Definition 5.8. ADC0GTL: ADC0 Greater-Than Data Low Byte
Bits7–0: High byte of ADC0 Greater-Than Data Word.
R/W R/W R/W R/W R/W R/W R/W R/W Reset Value
11111111
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 SFR Address:
0xC4
Bits7–0: Low byte of ADC0 Greater-Than Data Word.
R/W R/W R/W R/W R/W R/W R/W R/W Reset Value
11111111
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 SFR Address:
0xC3