Silicon Laboratories SI4734/35-B20 - Manual (Page 21)

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4.7. Digital Audio Interface (Si4735 Only)
The digital audio interface operates in slave mode and
supports three different audio data formats:
„ I
2
S
„ Left-Justified
„ DSP Mode
4.7.1. Audio Data Formats
In I
2
S mode, by default the MSB is captured on the
second rising edge of DCLK following each DFS
transition. The remaining bits of the word are sent in
order, down to the LSB. The left channel is transferred
first when the DFS is low, and the right channel is
transferred when the DFS is high.
In Left-Justified mode, by default the MSB is captured
on the first rising edge of DCLK following each DFS
transition. The remaining bits of the word are sent in
order, down to the LSB. The left channel is transferred
first when the DFS is high, and the right channel is
transferred when the DFS is low.
In DSP mode, the DFS becomes a pulse with a width of
1 DCLK period. The left channel is transferred first,
followed right away by the right channel. When
transferring the digital audio data in DSP mode, the
MSB of the left channel can be transferred on the first
rising edge of DCLK following the DFS pulse or on the
second rising edge.
In all audio formats, depending on the word size, DCLK
frequency, and sample rates, there may be unused
DCLK cycles after the LSB of each word and before the
next DFS transition and MSB of the next word. In
addition, if preferred, the user can configure the MSB to
be captured on the falling edge of DCLK via properties.
The number of audio bits can be configured for 8, 16,
20, or 24 bits.
4.7.2. Audio Sample Rates
The device supports a number of industry-standard
sampling rates including 32, 40, 44.1, and 48 kHz. The
digital audio interface enables low-power operation by
eliminating the need for redundant DACs on the audio
baseband processor.