Si4421, Tx register buffered data transmission – Silicon Laboratories SI4421 User Manual

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Si4421

The best practice in interrupt handling is to start with a status read when interrupt occurs, and then make a decision based on the
status byte. It is very important to mention that any interrupt can “wake-up” the EZradio chip from sleep mode. This means that the
crystal oscillator starts to supply clock signal to the microcontroller even if the microcontroller has its own clock source. Also, the
Si4421 will not go to low current sleep mode if any interrupt remains active regardless to the state of the ex (enable crystal
oscillator) bit in the Power Management Command (page 15). This way the microcontroller always can have clock signal to process
the interrupt. To prevent high current consumption and this way short battery life, it is strongly advised to process and clear every
interrupt before going to sleep mode. All unnecessary functions should be turned off to avoid unwanted interrupts. Before freezing
the microcontroller code, a thorough testing must be performed in order to make sure that all interrupt sources are handled before
putting the radio device to low power consumption sleep mode. If the dc bit is set in the Power Management Command, then only
the ex bit controls the crystal oscillator (supposing that both the er and et bits are cleared), the interrupts have no effect on it.

TX REGISTER BUFFERED DATA TRANSMISSION

In this operating mode (enabled by bit el, in the Configuration Setting Command, page 15) the TX data is clocked into one of the two
8-bit data registers. The transmitter starts to send out the data from the first register (with the given bit rate) when bit et is set with
the Power Management Command (page 15). The initial value of the data registers (AAh) can be used to generate preamble. During
this mode, the SDO pin can be monitored to check whether the register is ready (SDO is high) to receive the next byte from the
microcontroller.