SMSC LAN9420 - Manual (Page 57)

Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
SMSC LAN9420/LAN9420i 57 Revision 1.22 (09-25-08)
DATASHEET
3.5.4 Wakeup Frame Detection
Setting the Wakeup Frame Enable bit (WAKE_EN) in the “WUCSR—Wakeup Control and Status
Register”, places the MAC in the wakeup frame detection mode. In this mode, normal data reception
is disabled, and detection logic within the MAC examines receive data for the pre-programmed wakeup
frame patterns. Upon detection of a wake event, the MAC will assert the wake event interrupt to the
Interrupt Controller. In turn, the Interrupt Controller can be programmed to assert its interrupt (IRQ) to
the PCIB. In reduced power modes, the IRQ interrupt can be used to generate a wakeup event using
the nPME signal, which, if enabled to do so, will return the system to its normal operational state (S0
state). The IRQ interrupt can also be used to generate an interrupt to the Host, via the nINT signal.
Upon detection, the Wakeup Frame Received bit (WUFR) in the WUCSR is set. When the Host system
clears the WUEN bit, the MAC will resume normal receive operation.
Before putting the MAC into the wakeup frame detection state, the Host application must provide the
detection logic with a list of sample frames and their corresponding byte masks. This information is
written into the Wakeup Frame Filter register (WUFF). Please refer to
Section 4.4.11, "Wakeup Frame
Filter (WUFF)," on page 132 for additional information on this register.
The MAC supports four programmable filters that support many different receive packet patterns. If
remote wakeup mode is enabled, the remote wakeup function receives all frames addressed to the
MAC. It then checks each frame against the enabled filter and recognizes the frame as a remote
wakeup frame if it passes the wakeup frame filter register’s address filtering and CRC value match.
In order to determine which bytes of the frames should be checked by the CRC module, the MAC uses
a programmable byte mask and a programmable pattern offset for each of the four supported filters.
The pattern’s offset defines the location of the first byte that should be checked in the frame. The byte
mask is a 31-bit field that specifies whether or not each of the 31 contiguous bytes within the frame,
beginning in the pattern offset, should be checked. If bit j in the byte mask is set, the detection logic
checks byte offset + j in the frame.
In order to load the Wakeup Frame Filter register, the LAN driver software must perform eight writes
to the Wakeup Frame Filter register (WUFF).
Table 3.14 shows the Wakeup Frame Filter register’s
structure.
Note 3.1 Wakeup frame detection can be performed when LAN9420/LAN9420i is in any power
state. Wakeup frame detection is enabled when the WUEN bit is set.
Note: When wake-up frame detection is enabled via the WUEN bit of the Wakeup Control and Status
Register (WUCSR) , a broadcast wake-up frame will wake-up the device despite the state of
the Disable Broadcast (BCAST) bit in the MAC Control Register (MAC_CR) .
Table 3.14 Wakeup Frame Filter Register Structure
Filter 0 Byte Mask
Filter 1 Byte Mask
Filter 2 Byte Mask
Filter 3 Byte Mask
Reserved Filter 3
Command
Reserved Filter 2
Command
Reserved Filter 1
Command
Reserved Filter 0
Command
Filter 3 Offset Filter 2 Offset Filter 1Offset Filter 0 Offset
Filter 1 CRC-16 Filter 0 CRC-16
Filter 3 CRC-16 Filter 2 CRC-16