1 basic control register, Basic control register, Phy soft reset – SMSC LAN9420 User Manual

Page 136: Datasheet 4.5.1 basic control register

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Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface

Datasheet

Revision 1.22 (09-25-08)

136

SMSC LAN9420/LAN9420i

DATASHEET

4.5.1

Basic Control Register

Index (In Decimal):

0

Size:

16 bits

BITS

DESCRIPTION

TYPE

DEFAULT

15

PHY Soft Reset
1 = PHY software reset. Bit is self-clearing. When setting this bit do not set
other bits in this register.

R/W/SC

0b

14

Loopback
1 = loopback mode, 0 = normal operation

R/W

0b

13

Speed Select
1 = 100Mbps, 0 = 10Mbps. Ignored if Auto Negotiation is enabled (0.12 =
1).

R/W

1b

12

Auto-Negotiation Enable
1 = enable auto-negotiate process (overrides 0.13 and 0.8) 0 = disable
auto-negotiate process.

R/W

1b

11

Power Down
1 = General Power-Down mode, 0 = normal operation

Note:

For maximum power savings, auto-negotiation should be disabled
before enabling the General Power-Down mode.

R/W

0b

10

RESERVED

RO

-

9

Restart Auto-Negotiate
1 = restart auto-negotiate process 0 = normal operation. Bit is self-clearing.

R/W/SC

0b

8

Duplex Mode
1 = full duplex, 0 = half duplex. Ignored if Auto Negotiation is enabled (0.12
= 1).

R/W

0b

7

Collision Test
1 = enable COL test, 0 = disable COL test

R/W

0b

6:0

RESERVED

RO

-

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