NEC PD750008 User Manual
User's manual
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Table of contents
Document Outline
- COVER
- GENERAL
- PIN FUNCTIONS
- PIN FUNCTIONS OF THE µPD750008
- PIN FUNCTIONS
- P00-P03 [PORT0]
- P10-P13 [PORT1]
- P20-P23 [PORT2]
- P30-P33 [PORT3]
- P40-P43 [PORT4], P50-P53 [PORT5]
- P60-P63 [PORT6], P70-P73 [PORT7]
- P80, P81 [PORT8]
- TI0
- PTO0, PTO1
- PCL
- BUZ
- SCK, SO/SB0, SI/SB1
- INT4
- INT0, INT1
- INT2
- KR0-KR3
- KR4-KR7
- X1, X2
- XT1, XT2
- RESET
- V DD
- V SS
- IC [for the µPD750004, µPD750006, and µPD750008 only]
- V PP [for the µPD75P0016 only]
- MD0-MD3 [for the µPD75P0016 only]
- PIN INPUT/OUTPUT CIRCUITS
- CONNECTION OF UNUSED PINS
- FEATURES OF THE ARCHITECTURE AND MEMORY MAP
- NTERNAL CPU FUNCTIONS
- PERIPHERAL HARDWARE FUNCTIONS
- INTERRUPT AND TEST FUNCTIONS
- CONFIGURATION OF THE INTERRUPT CONTROL CIRCUIT
- TYPES OF INTERRUPT SOURCES AND VECTOR TABLES
- VARIOUS DEVICES TO CONTROL INTERRUPT FUNCTIONS
- INTERRUPT SEQUENCE
- MULTIPLE INTERRUPT PROCESSING CONTROL
- PROCESSING OF INTERRUPTS SHARING A VECTOR ADDRESS
- MACHINE CYCLES FOR STARTING INTERRUPT PROCESSING
- EFFECTIVE USE OF INTERRUPTS
- INTERRUPT APPLICATIONS
- TEST FUNCTION
- STANDBY FUNCTION
- RESET FUNCTION
- WRITING TO AND VERIFYING PROGRAM MEMORY [PROM]
- MASK OPTION
- INSTRUCTION SET
- UNIQUE INSTRUCTIONS
- INSTRUCTION SET AND OPERATION
- INSTRUCTION CODES OF EACH INSTRUCTION
- FUNCTIONS AND APPLICATIONS OF THE INSTRUCTIONS
- Transfer Instructions
- Table Reference Instructions
- Bit Transfer Instructions
- Arithmetic/Logical Instructions
- Accumulator Manipulation Instructions
- Increment/Decrement Instructions
- Compare Instructions
- Carry Flag Manipulation Instructions
- Memory Bit Manipulation Instructions
- Branch Instructions
- Subroutine Stack Control Instructions
- Interrupt Control Instructions
- I/O Instructions
- CPU Control Instructions
- Special Instructions
- APPENDIX