National Products LMX9820A User Manual

Page 10

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10

(Confidential) Revision 0.2

LMX9820ADEV

: LMX9820A Simpl

y

Blue Module Kit User’

s

Guide

2.2

AUSTIN DAUGHTERBOARD SUMMARY

The Austin Rev. 1 Daughterboard is populated with a 12 MHz crystal. Reference the schematic, BOM, and board for more
details. Table 2-17 lists the primary devices on the board and Table 2-18 lists the connectors and headers.

2.2.1

J2 Test Point Header

J2 is a 2-pin test point header for internal use only.

2.2.2

J4 Test Point Header

J4 is a 5-pin test point header for different voltage rails on
the board.

2.2.3

J7 Test Point Header

J7 is a 2-pin test point header for a 32.768 kHz crystal.

2.2.4

J26 Test Point Header

J26 is a 10-pin test point header for the CCB interface, TR
Switch, Reset#, and BBCLK. These are provided for debug
purposes.

Table 2-17. Austin Daughterboard Device Summary

Device #

Name

U1

National LMX9820A Serial Port Module - Reference the device datasheet.

Y1

12 MHz Crystal - Reference the crystal device datasheet and the LMX9820A datasheet for details.

Y2

32.768 kHz Crystal for low power modes - Reference the crystal device datasheet and the LMX9820A
datasheet for more details.

Table 2-18. Connector and Header Summary

Connector/Header #

Name

Details

J1

50-pin Connector to Texas Motherboard

Table 2-23 on page 11

J2

2-pin Test Point

Table 2-19 on page 10

J3

SMA TX/RX Signal

Figure 2-3 on page 11

J4

5-pin Test Point

Table 2-20 on page 10

J5

SMA Optional External Clock

Figure 2-4 on page 11

J7

32.768 kHz 2-pin Test Point

Table 2-21 on page 10

J26

10-pin Test Point

Table 2-22 on page 10

Table 2-19. J2 Pin Assignments

Pin #

Signal Name

Description

1

Reset_5100

Reset to baseband - internal use only

2

P12

Test Point - internal use only

Table 2-20. J4 Pin Assignments

Pin #

Signal Name

Description

1

IOVCC

Test point for IOVCC

2

VCC

Test point for VCC

3

VDD_ANA_OUT

Analog LDO output test point

4

VDD_DIG_PWR_D#

Digital LDO power down test
point

5

VDD_DIG_OUT

Digital LDO power output test
point

Table 2-21. J6 Pin Assignment

Pin #

Signal Name

Description

1

32.768 kHz +

32.768 kHz crystal

2

32.768 kHz -

32.768 kHz crystal

Table 2-22. J26 Pin Assignment

Pin #

Signal Name

Description

1

GND

Ground

2

BBCLK

12 Mhz Baseband Clock Test Point

3

CCB_LATCH

Serial Data Latch Test Point

4

TX_RX_SYNC

Test Point - internal use only

5

SDAT

Serial Data Test Point

6

RF_DATA

Test Point - internal use only

7

CCB_CLOCK

Serial Data Clock Test Point

8

RESET#

Reset - active low

9

TR_SWITCH

TR Switch Test Point

10

TX_RX_CLOCK

Test Point - internal use only

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