Renesas M65881AFP - Manual (Page 21)

Rev.1.00 2003.05.08 page 21 of 23
M65881AFP
APPLICATION EXAMPLE
Low Pass Filter
/Headphone Amplifier
Input Mode Select1
Secondary synchronized clock (For Multi channel )
Secondary Clock Select
L:1024Fso H:512Fso
Flag Output
Secondary Clock output
Oscillator
Power
Driver
Power
Driver
Initialize Control
Mute Control
Input Mode Select2
M65881AFP
LRCK
BCK
DATA
XfsiIN
(Primary Clock)
OUTL1
OUTL2
OUTR1
OUTR2
NSPMUTE
SCDT
SCSHIFT
SCLATCH
INIT
XFSOIN
(Secondary Clock)
MCKSEL
T
E
S
T
1
MODE1
MODE2
FsoCKO
FsoI
XFSOOUT
HPOUTR2
HPOUTL2
HPOUTL1
HPOUTR1
T
E
S
T
2 S
F
L
A
G
MCU
DSP