Transcend Information CompactFlash TS16G-64GCF400 User Manual

Page 35

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T

T

T

S

S

S

1

1

1

6

6

6

G

G

G

~

~

~

6

6

6

4

4

4

G

G

G

C

C

C

F

F

F

4

4

4

0

0

0

0

0

0


400X CompactFlash Card

Transcend Information Inc.

V1.0

35

4) The parameter tLI shall be measured at the connector of the sender or recipient that is responding to an incoming

transition from the recipient or sender respectively. Both the incoming signal and the outgoing response shall be
measured at the same connector.

5) The parameter tAZ shall be measured at the connector of the sender or recipient that is driving the bus but must release the

bus the allow for a bus turnaround.

Name

Comment

Notes

t

2CYCTYP

Typical sustained average two cycle time

t

CYC

Cycle time allowing for asymmetry and clock variations (from STROBE edge to STROBE edge)

t

2CYC

Two cycle time allowing for clock variations (from rising edge to next rising edge or from falling edge to
next falling edge of STROBE)

t

DS

Data setup time at recipient (from data valid until STROBE edge)

2, 5

t

DH

Data hold time at recipient (from STROBE edge until data may become invalid)

2, 5

t

DVS

Data valid setup time at sender (from data valid until STROBE edge)

3

t

DVH

Data valid hold time at sender (from STROBE edge until data may become invalid)

3

t

CS

CRC word setup time at device

2

t

CH

CRC word hold time device

2

t

CVS

CRC word valid setup time at host (from CRC valid until -DMACK negation)

3

t

CVH

CRC word valid hold time at sender (from -DMACK negation until CRC may become invalid)

3

t

ZFS

Time from STROBE output released-to-driving until the first transition of critical timing.

t

DZFS

Time from data output released-to-driving until the first transition of critical timing.

t

FS

First STROBE time (for device to first negate DSTROBE from STOP during a data in burst)

t

LI

Limited interlock time

1

t

MLI

Interlock time with minimum

1

t

UI

Unlimited interlock time

1

t

AZ

Maximum time allowed for output drivers to release (from asserted or negated)

t

ZAH

Minimum delay time required for output

t

ZAD

drivers to assert or negate (from released)

t

ENV

Envelope time (from -DMACK to STOP and -HDMARDY during data in burst initiation and from DMACK
to STOP during data out burst initiation)

t

RFS

Ready-to-final-STROBE time (no STROBE edges shall be sent this long after negation of -DMARDY)

t

RP

Ready-to-pause time (that recipient shall wait to pause after negating -DMARDY)

t

IORDYZ

Maximum time before releasing IORDY

6

t

ZIORDY

Minimum time before driving IORDY

4, 6

t

ACK

Setup and hold times for -DMACK (before assertion or negation)

t

SS

Time from STROBE edge to negation of DMARQ or assertion of STOP (when sender terminates a
burst)

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