Texas Instruments TMS320C64X - Manual (Page 100)

DSP_w_vec
4-72
Weighted Vector Sum DSP_w_vec
Function void DSP_w_vec(const short * restrict x, const short * restrict y, short m, short
* restrict r, short nr)
Arguments x[nr] Vector being weighted. Must be double-word aligned.
y[nr] Summation vector. Must be double-word aligned.
m Weighting factor
r[nr] Output vector
nr Dimensions of the vectors. Must be multiple of 8 and
≥
8.
Description This routine is used to obtain the weighted vector sum. Both the inputs and
output are 16-bit numbers.
Algorithm This is the C equivalent of the assembly code without restrictions. Note that
the assembly code is hand optimized and restrictions may apply.
void DSP_w_vec(short x[ ],short y[ ],short m,
short r[ ],short nr)
{
short i;
for (i=0; i<nr; i++) {
r[i] = ((m * x[i]) >> 15) + y[i];
}
}
Special Requirements
- nr must be a multiple of 8 and ≥ 8.
- Vectors x[ ] and y[ ] must be double-word aligned.
Implementation Notes
- Bank Conflicts: No bank conflicts occur.
- Interruptibility: The code is interrupt-tolerant but not interruptible.
- Input is loaded in double-words.
- Use of packed data processing to sustain throughput.
Benchmarks Cycles 3 * nr/8 + 18
Codesize 144 bytes