Texas Instruments TMS320C64X - Manual (Page 141)

DSP_fft16x16t
4-113 C64x+ DSPLIB Reference
/* y0i = x0i + x2i + x1i + x3i = xh1 + xh21 */
/* y1r = x0r − x2r + (x1i − x3i) = xl0 + xl21 */
/* y1i = x0i − x2i − (x1r − x3r) = xl1 − xl20 */
/* y2r = x0r + x2r − (x1r + x3r) = xh0 − xh20 */
/* y2i = x0i + x2i − (x1i + x3i = xh1 − xh21 */
/* y3r = x0r − x2r − (x1i − x3i) = xl0 − xl21 */
/* y3i = x0i − x2i + (x1r − x3r) = xl1 + xl20 */
/* −−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−*/
y0r = xh0_0 + xh20_0; y0i = xh1_0 + xh21_0;
y4r = xh0_1 + xh20_1; y4i = xh1_1 + xh21_1;
xt0_0 = xh0_0 − xh20_0; yt0_0 = xh1_0 − xh21_0;
xt0_1 = xh0_1 − xh20_1; yt0_1 = xh1_1 − xh21_1;
xt1_0 = xl0_0 + xl21_0; yt2_0 = xl1_0 + xl20_0;
xt2_0 = xl0_0 − xl21_0; yt1_0 = xl1_0 − xl20_0;
xt1_1 = xl0_1 + xl21_1; yt2_1 = xl1_1 + xl20_1;
xt2_1 = xl0_1 − xl21_1; yt1_1 = xl1_1 − xl20_1;
/*−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−*/
/* Store out first output, of the four outputs of a radix4 */
/* butterfly. Since two such radix4 butterflies are per− */
/* formed in parallel, there are 2 such 1st outputs. */
/*−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−*/
x2[0] = y0r; x2[1] = y0i;
x2[2] = y4r; x2[3] = y4i;
/*−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−*/
/* Perform twiddle factor multiplies of three terms,top */
/* term does not have any multiplies. Note the twiddle */
/* factors for a normal FFT are C + j (−S). Since the */
/* factors that are stored are C + j S, this is */
/* corrected for in the multiplies. */
/* */
/* Y1 = (xt1 + jyt1) (c + js) = (xc + ys) + (yc −xs) */
/* Perform the multiplies using 16 by 32 multiply macro */
/* defined. This treats the twiddle factor as 16 bits */
/* and incoming data as 32 bits. */
/*−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−*/
x2[h2 ] = (si10 * yt1_0 + co10 * xt1_0) >> 15;