Texas Instruments TMS320C645x DSP User Manual

Page 114

Advertising
background image

www.ti.com

EMAC Port Registers

Table 57. MAC Control Register (MACCONTROL) Field Descriptions (continued)

Bit

Field

Value

Description

1

Receive flow control enabled. For full-duplex mode, outgoing pause frames are sent when
receive FIFO flow control is triggered.

11

CMDIDLE

Command Idle bit

0

Idle not commanded

1

Idle commanded (read IDLE in the MACSTATUS register)

10

Reserved

0

Reserved

9

TXPTYPE

Transmit queue priority type

0

The queue uses a round-robin scheme to select the next channel for transmission

1

The queue uses a fixed-priority (channel 7 highest priority) scheme to select the next channel
for transmission

8

Reserved

0

Reserved

7

GIG

Gigabit mode

0

Gigabit mode is disabled; 10/100 mode is in operation

1

Gigabit mode is enabled (full-duplex only)

6

TXPACE

Transmit pacing enable bit

0

Transmit pacing is disabled

1

Transmit pacing is enabled

5

GMIIEN

GMII enable bit

0

GMII RX and TX are held in reset

1

GMII RX and TX are enabled for receive and transmit

4

TXFLOWEN

Transmit flow control enable bit. This bit determines if incoming pause frames are acted upon in
full-duplex mode. Incoming pause frames are not acted upon in half-duplex mode, regardless of
this bit setting. The RXMBPENABLE bits determine whether or not received pause frames are
transferred to memory.

0

Transmit flow control is disabled. Full-duplex mode: incoming pause frames are not acted upon.

1

Transmit flow control is enabled. Full-duplex mode: incoming pause frames are acted upon.

3

RXBUFFER

Receive buffer flow control enable bit

FLOWEN

0

Receive flow control is disabled. Half-duplex mode: no flow control generated collisions are
sent. Full-duplex mode: no outgoing pause frames are sent.

1

Receive flow control is enabled. Half-duplex mode: collisions are initiated when receive buffer
flow control is triggered. Full-duplex mode: outgoing pause frames are sent when receive flow
control is triggered.

2

Reserved

0

Reserved

1

LOOPBACK

Loopback mode. The loopback mode forces internal full-duplex mode regardless of the
FULLDUPLEX bit. The loopback bit should be changed only when GMIIEN bit is de-asserted.

0

Loopback mode is disabled

1

Loopback mode is enabled

0

FULLDUPLEX

Full duplex mode. The gigabit mode forces full duplex mode regardless of whether the
FULLDUPLEX bit is set or not.

0

Half-duplex mode is enabled

1

Full-duplex mode is enabled

Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO)

114

SPRU975B – August 2006

Submit Documentation Feedback

Advertising