Texas Instruments TMS320C645x DSP - Manual (Page 131)

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5.45 MAC Index Register (MACINDEX)
EMAC Port Registers
The MAC index register (MACINDEX) is shown in Figure 73 and described in Table 73 .
Figure 73. MAC Index Register (MACINDEX)
31 16
Reserved
R-0
15 5 4 0
Reserved MACINDEX
R-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 73. MAC Index Register (MACINDEX) Field Descriptions
Bit Field Value Description
31-5 Reserved 0 Reserved
4-0 MACINDEX MAC address index. The host must write the index into the RX ADDR RAM in the MACINDEX field,
followed by the upper 32-bits of address, followed by the lower 16-bits of address (with control bits).
The 53-bit indexed ram location is written when the low location is written. All 32 address RAM
locations must be initialized prior to enabling packet reception.
SPRU975B – August 2006 Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO) 131
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