Vizio L42HDTV10A - Manual (Page 74)

CONFIDENTIAL – DO NOT COPY Page 7-55
File No. SG-0198
The time between the Write command and the first corresponding rising edge of DQS (tDQSS) is
specified with a relatively wide range (from 75% to 125% of one clock cycle), so most of the Write
diagrams that follow are drawn for the two extreme cases (i.e. tDQSS(min) and tDQSS(max)).
Timing figure Write Burst (Burst Length = 4) on page 33 shows the two extremes of tDQSS for a
burst of four. Upon completion of a burst, assuming no other commands have been initiated, the
DQs and DQS enters High-Z and any additional input data is ignored.Data for any Write burst may
be concatenated with or truncated with a subsequent Write command. In either case, a continuous
flow of input data can be maintained. The new Write command can be issued on any positive edge
of clock following the previous Write command. The first data element from the new burst is applied
after either the last element of a completed burst or the last desired data element of a longer burst
which is being truncated. The new Write command should be issued x cycles after the first Write
command, where x equals the number of desired data element pairs (pairs are required by the 2n
prefetch architecture).
Write Command