Vishay semiconductors – C&H Technology GA100TS120UPbF User Manual

Page 5

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VS-GA100TS120UPbF

www.vishay.com

Vishay Semiconductors

Revision: 26-Mar-12

4

Document Number: 94428

For technical questions within your region:

[email protected]

,

[email protected]

,

[email protected]

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

www.vishay.com/doc?91000

Fig. 4 - Case Temperature vs.

Maximum Collector Current

Fig. 5 - Typical Collector to Emitter Voltage vs.

Junction Temperature

Fig. 6 - Maximum Effective Transient Thermal Impedance, Junction to Case

Fig. 7 - Typical Capacitance vs.

Collector to Emitter Voltage

Fig. 8 - Typical Gate Charge vs. Gate to Emitter Voltage

0

40

80

120

160

200

0

20

40

60

80

100

120

140

160

T

C

- Case Temperature (°C)

Maximum DC Collector Current (A)

DC

0

30

60

90

120

150

1.5

2.0

2.5

3.0

V

GE

= 15 V

500 µs pulse width

T

J

- Junction Temperature (°C)

V

CE

- Collector to Emitter Voltage (V)

I

C

= 50 A

I

C

= 200 A

I

C

= 100 A

0.01

0.1

1

0.0001

0.001

0.01

0.1

1

t

1

- Rectangular Pulse Duration (s)

Z

thJC

- Thermal Response

10

.

P

DM

t

1

t

2

Notes:
1. Duty factor D = t

1

/t

2

2. Peak T

J

= P

DM

x Z

thJC

+ T

C

Single pulse

(thermal resistance)

D = 0.50

D = 0.20

D = 0.10

D = 0.05

D = 0.02

D = 0.01

1

10

100

0

V

CE

- Collector to Emitter Voltage (V)

C - Capacitance (pF)

7000

14 000

21 000

28 000

35 000

V

GE

= 0 V, f = 1 MHz

C

ies

= C

ge

+ C

gc

, C

ce

shorted

C

res

= C

gc

C

oes

= C

ce

+ C

gc

C

ies

C

oes

C

res

0

300

600

900

0

4

8

12

16

20

Q

G

- Total Gate Charge (nC)

V

GE

- Gate to Emitter Voltage (V)

V

CC

= 400 V

I

C

= 113 A

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