Rainbow Electronics MAX15041 User Manual

Page 12

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MAX15041

Having defined the power modulator’s transfer function
gain, the total system loop gain can be written as fol-
lows (see Figure 1):

where R

OUT

is the quotient of the error amplifier’s DC

gain, A

VEA

, divided by the error amplifier’s transcon-

ductance, g

MV

; R

OUT

is much larger than R

C

and C

C

is

much larger than C

CC

.

Rewriting:

The dominate poles and zeros of the transfer loop gain
is shown below:

The order of pole-zero occurrence is:

Note under heavy load, f

P2

, may approach f

Z1

.

A graphical representation of the asymptotic system
closed-loop response, including the dominant pole and
zero locations is shown in Figure 2.

f

f

f

f

f

P

P

Z

Z

P

1

2

1

2

3

<

<

<

f

g

C

f

C

ESR

P

MV

AVEA dB

C

P

OUT

1

20

2

2

10

1

2

=

Ч

Ч

=

Ч

+

π

π

_

/

R

R

f

C

R

f

C R

f

LOAD

P

CC C

Z

C C

Z

(

)

=

Ч

=

Ч

=

3

1

2

1

2

1

2

1

2

π

π

ππ × C

ESR

OUT

Gain

V

V

A

sC R

sC

A

g

FB

OUT

VEA

C C

C

VEA

MV

=

Ч

+

(

)


⎝⎜


⎠⎟

+

1

1

1

1

1



⎥ Ч

+

(

)

Ч

Ч

+

(

)

sC

R

G

R

sC

ESR

CC C

MOD LOAD

OUT

s

sC

ESR R

OUT

LOAD

+

(

)

+

⎡⎣

⎤⎦

1

α =

Ч

+

(

)

+

(

)

+

(

)

+

⎡⎣

⎤⎦ Ч

R

sC R

s C

C

R

R

s C

OUT

C C

C

CC

C

OUT

1

1

C

C

CC

C

OUT

MOD

LOAD

O

C

R

R

G

R

sC

||

||

(

)(

)

+

⎡⎣

⎤⎦

=

Ч

Ч

1

β

U

UT

OUT

LOAD

ESR

sC

ESR R

Gain

R

R

+

(

)

+

(

)

+

⎡⎣

⎤⎦

=

1

1

2

1

++

Ч

Ч Ч

R

A

R

VEA

OUT

2

α β

Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM
Step-Down DC-DC Regulator with Internal Switches

12

______________________________________________________________________________________

L0

Q

HS

CONTROL

LOGIC

V

COMP

V

OUT

PWM

COMPARATOR

COMP

R

C

R

OUT

g

MV

V

IN

POWER MODULATOR

OUTPUT FILTER

AND LOAD

NOTE: THE G

MOD

STAGE SHOWN ABOVE MODELS THE AVERAGE CURRENT OF

THE INDUCTOR INJECTED INTO THE OUTPUT LOAD. THIS REPRESENTS A
SIMPLIFICATION FOR THE POWER MODULATOR STAGE DRAWN ABOVE.

ERROR AMPLIFIER

FEEDBACK

DIVIDER

COMPENSATION

RAMP

g

MC

DCR

I

L

Q

LS

V

OUT

V

OUT

I

L

ESR

C

OUT

R

LOAD

C

C

REF

*C

CC

IS OPTIONAL.

R

OUT

= A

VEA

/g

MV

*C

CC

FB

R

1

R

2

G

MOD

Σ

Figure 1. Peak Current-Mode Regulator Transfer Model

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