Rainbow Electronics MAX17101 User Manual

Page 28

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MAX17101

Dual Quick-PWM, Step-Down Controller
with Low-Power LDO, RTC Regulator

28

______________________________________________________________________________________

Calculating again with h = 1 and the typical K-factor
value (K = 3.3μs) gives the absolute limit of dropout:

Therefore, V

IN(MIN)

must be greater than 3.06V, even

with very large output capacitance, and a practical
input voltage with reasonable output capacitance
would be 3.47V.

PCB Layout Guidelines

Careful PCB layout is critical to achieving low switching
losses and clean, stable operation. The switching
power stage requires particular attention. If possible,
mount all the power components on the top side of the
board, with their ground terminals flush against one
another. Follow these guidelines for good PCB layout:

Keep the high-current paths short, especially at the
ground terminals. This practice is essential for sta-
ble, jitter-free operation.

Keep the power traces and load connections short.
This practice is essential for high efficiency. Using
thick copper PCBs (2oz vs. 1oz) can enhance full-
load efficiency by 1% or more. Correctly routing
PCB traces is a difficult task that must be
approached in terms of fractions of centimeters,
where a single milliohm of excess trace resistance
causes a measurable efficiency penalty.

Minimize current-sensing errors by connecting LX_
directly to the drain of the low-side MOSFET.

When trade-offs in trace lengths must be made, it is
preferable to allow the inductor charging path to be
made longer than the discharge path. For example,
it is better to allow some extra distance between the
input capacitors and the high-side MOSFET than to

allow distance between the inductor and the low-
side MOSFET or between the inductor and the out-
put filter capacitor.

Route high-speed switching nodes (BST_, LX_,
DH_, and DL_) away from sensitive analog areas
(REF, FB_, and OUT_).

A sample layout is available in the MAX17101 evalua-
tion kit data sheet.

Layout Procedure

1) Place the power components first, with ground ter-

minals adjacent (N

L_

source, C

IN

, C

OUT_

, and D

L_

anode). If possible, make all these connections on
the top layer with wide, copper-filled areas.

2) Mount the controller IC adjacent to the low-side

MOSFET, preferably on the back side opposite N

L_

and N

H_

to keep LX_, GND, DH_, and the DL_ gate-

drive lines short and wide. The DL_ and DH_ gate
traces must be short and wide (50 mils to 100 mils
wide if the MOSFET is 1in from the controller IC) to
keep the driver impedance low and for proper
adaptive dead-time sensing.

3) Group the gate-drive components (BST_ capacitor,

V

DD

bypass capacitor) together near the controller IC.

4) Make the DC-DC controller ground connections as

shown in Figure 1. This diagram can be viewed as
having two separate ground planes: power ground,
where all the high-power components go; and an
analog ground plane for sensitive analog compo-
nents. The analog ground plane and power ground
plane must meet only at a single point directly at
the IC.

5) Connect the output power planes directly to the out-

put filter capacitor positive and negative terminals
with multiple vias. Place the entire DC-DC converter
circuit as close to the load as is practical.

V

V

V

ns

μs

IN MIN

(

)

.

.

.

.

=

+

×


⎝⎜


⎠⎟

=

2 5

0 1

1

1 500

3 3

3 06

6V

MAX17101

MAX8778

RTC power-up required for controller operation.

LDO and switching regulators independent of RTC operation.

LDO does not support 0.3V ~ 2V adjustable output; LDO is
preset to 5V or 3.3V.

LDO external reference input for 0.3V ~ 2V adjustable output in
addition to preset 5V or 3.3V.

Table 5. MAX17101 vs. MAX8778 Design Differences

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