Rainbow Electronics MAX8649 - Manual (Page 18)

MAX8649
1.8A Step-Down Regulator with Differential
Remote Sense in 2mm x 2mm WLP
18 ______________________________________________________________________________________
Update of Output Operation Mode
If updating the output voltage or Operation Mode regis-
ter for the mode that the MAX8649 is currently operat-
ing in, the output voltage/operation mode is updated at
the same time the MAX8649 sends the acknowledge for
the I
2 C data byte (see Figure 13).
Slave Address
A bus master initiates communication with a slave
device (MAX8649) by issuing a START (S) condition fol-
lowed by the slave address. The slave address byte
consists of 7 address bits (1100 000x) and a read/write
bit (R/
W). After receiving the proper address, the
MAX8649 issues an acknowledge by pulling SDA low
during the ninth clock cycle.
Other slave addresses can be assigned. Contact the
factory for details.
Write Operations
The MAX8649 recognizes the write byte protocol as
defined in the SMBus specification and shown in Figures
14a and 14b. The write byte protocol allows the I
2 C mas-
ter device to send 1 byte of data to the slave device. The
write byte protocol requires a register pointer address for
the subsequent write. The MAX8649 acknowledges any
register pointer even though only a subset of those regis-
ters actually exists in the device. The write byte protocol
is as follows:
1) The master sends a start command.
2) The master sends the 7-bit slave address followed
by a write bit.
3) The addressed slave asserts an acknowledge by
pulling SDA low.
4) The master sends an 8-bit register pointer.
5) The slave acknowledges the register pointer.
6) The master sends a data byte.
7) The slave acknowledges the data byte.
8) The slave updates with the new data.
9) The master sends a STOP (P) condition.
In addition to the write-byte protocol, the MAX8649 can
write to multiple registers as shown in Figure 14b. This
protocol allows the I
2 C master device to address the
slave only once and then send data to a sequential block
of registers starting at the specified register pointer.
Use the following procedure to write to a sequential
block of registers:
1) The master sends a start command.
2) The master sends the 7-bit slave address followed
by a write bit.
3) The addressed slave asserts an acknowledge by
pulling SDA low.
4) The master sends the 8-bit register pointer of the
first register to write.
5) The slave acknowledges the register pointer.
6) The master sends a data byte.
7) The slave acknowledges the data byte.
8) The slave updates with the new data.
9) Steps 6 to 8 are repeated for as many registers in
the block, with the register pointer automatically
incremented each time.
10) The master sends a STOP condition.
A: I 2 C START COMMAND.
B: I 2 C SLAVE ADDRESS OF MAX8649 SEND OUT.
C: MAX8649 I 2 C REGISTER POINTER SEND OUT.
D: MAX8649 DATA SEND OUT.
E: MAX8649 ISSUES ACKNOWLEDGE AND CHANGES THE OUTPUT VOLTAGE ACCORDING TO NEW I
2 C SETTINGS.
SDA
OUT
VID0
VID1
V DD
S SLAVE ID ASr REG PTR ASr DATA A P
A B C D E
Figure 13. Update Output Operation