Rainbow Electronics MAX15022 User Manual

Page 21

Advertising
background image

MAX15022

Dual, 4A/2A, 4MHz, Step-Down DC-DC

Regulator with Dual LDO Controllers

______________________________________________________________________________________

21

The locations of the zeros and poles should be such
that the phase margin peaks around f

CO

.

Set the ratios of f

CO

-to-f

Z

and f

P

-to-f

CO

equal to one anoth-

er, e.g., f

CO

= f

P

= 5 is a good number to get approximately

f

Z

f

CO

60° of phase margin at f

CO

. Whichever technique, it is

important to place the two zeros at or below the double
pole to avoid the conditional stability issue.

The following procedure is recommended:

1) Select a crossover frequency, f

CO

, at or below one-

tenth the switching frequency (f

SW

):

2) Calculate the LC double-pole frequency, f

LC

:

where C

OUT

is the output capacitor of the regulator.

3) Select the feedback resistor, R

F

, in the range of

3.3k

Ω to 30kΩ.

4) Place the compensator’s first zero

at or below the output filter’s dou-
ble-pole, f

LC

, as follows:

5) The gain of the modulator (Gain

MOD

)—comprised of

the regulator’s PWM, LC filter, feedback divider, and
associated circuitry—at the crossover frequency is:

The gain of the error amplifier (Gain

E/A

) in midband fre-

quencies is:

The total loop gain is the product of the modulator gain
and the error amplifier gain at f

CO

should be equal to 1,

as follows:

Gain

MOD

x Gain

E/A

= 1

So:

Solving for C

I

:

6) For those situations where f

LC

< f

CO

< f

ESR

< f

SW

/2,

as with low-ESR tantalum capacitors, the compen-
sator’s second pole (f

P2

) should be used to cancel

f

ESR

. This provides additional phase margin. On the

system Bode plot, the loop gain maintains its
+20dB/decade slope up to 1/2 of the switching fre-
quency verses flattening out soon after the 0dB
crossover. Then set:

f

P2

= f

ESR

If a ceramic capacitor is used, then the capacitor ESR
zero, f

ESR

, is likely to be located even above 1/2 of the

switching frequency, that is f

LC

< f

CO

< f

SW

/2 < f

ESR

. In

this case, the frequency of the second pole (f

P2

) should

be placed high enough not to significantly erode the
phase margin at the crossover frequency. For example,
f

P2

can be set at 5 x f

CO

, so that its contribution to phase

loss at the crossover frequency f

CO

is only about 11°:

f

P2

= 5 x f

CO

Once f

P2

is known, calculate R

I

:

7) Place the second zero (f

Z2

) at 0.2 x f

CO

or at f

LC

,

whichever is lower, and calculate R

1

using the fol-

lowing equation:

8) Place the third pole (f

P3

) at 1/2 the switching fre-

quency and calculate C

CF

from:

9) Calculate R

2

as:

where V

FB

= 0.6V (typ).

R [k ] R [k ]

V

[V]

V

[V] V

[V]

2

1

FB

OUT_

FB

Ω

Ω

=

×

C

[ F]

1

2

0.5 f

[MHz] R [k ]

CF

SW

F

n

=

Ч

Ч

Ч

(

)

π

Ω

R [k ]

1

2

f

[kHz] C [ F]

1

Z2

I

Ω =

Ч

Ч

π

μ

R [k ]

1

2

f

[kHz] C [ F]

I

P2

I

Ω =

Ч

Ч

π

μ

C pF]

2

f

[kHz] L[ H] C

[ F]

4 R [k ]

I

CO

OUT

F

[

=

Ч

Ч

Ч

(

)

Ч

π

μ

μ

Ω

4

1

(2

f

[kHz])

C

[ F] L[ H]

2

f

[kHz] C [ F] R [k ]

1

CO

2

OUT

CO

I

F

Ч

Ч

Ч

Ч

Ч

Ч

Ч

Ч

=

π

μ

μ

π

p

Ω

Gain

2

f

[kHz] C [ F] R [k ]

E/A

CO

I

F

=

Ч

Ч

Ч

π

μ

Ω

Gain

4

1

(2

f

[MHz])

L[ H] C

[ F]

MOD

CO

2

OUT

= Ч

Ч

Ч

Ч

π

μ

μ

C [ F]

1

2

R [k ] 0.5 f

[kHz]

F

F

LC

μ

π

=

Ч

Ч

Ч

Ω

f

[MHz]

1

2

L[ H] C

F]

LC

OUT

Ч

Ч

π

μ

μ

[

f

[kHz]

f

[kHz]

10

CO

SW

f

1

2

R

C

Z1

F

F

=

Ч

Ч

π

Advertising