Rainbow Electronics DS21458 User Manual

Page 23

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DS21455/DS21458 Quad T1/E1/J1 Transceivers

23 of 270


Signal Name:

RSYNC

Signal Description:

Receive Sync

Signal Type:

Input/Output

An extracted pulse, one RCLK wide, is output at this pin which identifies either frame (IOCR1.5 = 0) or multiframe
(IOCR1.5 = 1) boundaries. If set to output-frame boundaries then via IOCR1.6, RSYNC can also be set to output double-wide
pulses on signaling frames in T1 mode. If the receive-side elastic store is enabled, then this pin can be enabled to be an input
via IOCR1.4 at which a frame or multiframe boundary pulse is applied.

Signal Name:

RFSYNC

Signal Description:

Receive Frame Sync

Signal Type:

Output

An extracted 8kHz pulse, one RCLK wide, is output at this pin, which identifies frame boundaries.

Signal Name:

RMSYNC

Signal Description:

Receive Multiframe Sync

Signal Type:

Output

An extracted pulse, one RCLK wide (elastic store disabled) or one RSYSCLK wide (elastic store enabled), is output at this pin,
which identifies multiframe boundaries.

Signal Name:

RDATA

Signal Description:

Receive Data

Signal Type:

Output

Updated on the rising edge of RCLK with the data out of the receive-side framer.

Signal Name:

RSYSCLK

Signal Description:

Receive System Clock

Signal Type:

Input

1.544MHz, 2.048MHz, 4.096MHz, or 8.192MHz clock. Only used when the receive-side elastic-store function is enabled.
Should be tied low in applications that do not use the receive-side elastic store. See the Interleaved PCM Bus Operation
section for details on 4.096MHz and 8.192MHz operation using the IBO.

Signal Name:

RSIG

Signal Description:

Receive Signaling Output

Signal Type:

Output

Outputs signaling bits in a PCM format. Updated on rising edges of RCLK when the receive-side elastic store is disabled.
Updated on the rising edges of RSYSCLK when the receive-side elastic store is enabled.

Signal Name:

RLOS/LOTC

Signal Description:

Receive Loss of Sync/Loss of Transmit Clock

Signal Type:

Output

A dual-function output that is controlled by the CCR1.0 control bit. This pin can be programmed to either toggle high when the
synchronizer is searching for the frame and multiframe or to toggle high if the TCLK pin has not been toggled for 5

ms.


Signal Name:

RCL

Signal Description:

Receive Carrier Loss

Signal Type:

Output

Set high when the line interface detects a carrier loss.

Signal Name:

RSIGF

Signal Description:

Receive Signaling Freeze

Signal Type:

Output

Set high when the signaling data is frozen via either automatic or manual intervention. Used to alert downstream equipment of
the condition.

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