Atmega162/v – Rainbow Electronics ATmega162V User Manual
Page 27
27
ATmega162/V
2513E–AVR–09/03
Figure 14. External Data Memory Cycles with SRWn1 = 0 and SRWn0 = 1
Note:
1. SRWn1 = SRW11 (upper sector) or SRW01 (lower sector), SRWn0 = SRW10 (upper
sector) or SRW00 (lower sector)
The ALE pulse in period T5 is only present if the next instruction accesses the RAM
(internal or external).
Figure 15. External Data Memory Cycles with SRWn1 = 1 and SRWn0 = 0
Note:
1. SRWn1 = SRW11 (upper sector) or SRW01 (lower sector), SRWn0 = SRW10 (upper
sector) or SRW00 (lower sector).
The ALE pulse in period T6 is only present if the next instruction accesses the RAM
(internal or external).
ALE
T1
T2
T3
Wr
ite
Read
WR
T5
A15:8
Address
Prev. addr.
DA7:0
Address
Data
Prev. data
XX
RD
DA7:0 (XMBK = 0)
Data
Address
Data
Prev. data
Address
DA7:0 (XMBK = 1)
System Clock (CLK
CPU
)
T4
ALE
T1
T2
T3
Wr
ite
Read
WR
T6
A15:8
Address
Prev. addr.
DA7:0
Address
Data
Prev. data
XX
RD
DA7:0 (XMBK = 0)
Data
Address
Data
Prev. data
Address
DA7:0 (XMBK = 1)
System Clock (CLK
CPU
)
T4
T5