Rainbow Electronics ATA6625 - Manual (Page 3)

3
4957E–AUTO–10/07
ATA6623/ATA6625
3. Functional Description
3.1 Physical Layer Compatibility
Since the LIN physical layer is independent from higher LIN layers (e.g., LIN protocol layer), all
nodes with a LIN physical layer according to revision 2.0 can be mixed with LIN physical layer
nodes, which are according to older versions (i.e., LIN 1.0, LIN 1.1, LIN 1.2, LIN 1.3) without any
restrictions.
3.2 Supply Pin (VS)
LIN operating voltage is V
S
= 5V to 27V. An undervoltage detection is implemented to disable
transmission if V
S
falls below 5V, in order to avoid false bus messages. After switching on V
S
,
the IC starts with the Fail-safe mode and the voltage regulator is switched on (i.e.,
3.3V/5V/50 mA).
The supply current in Sleep mode is typically 10 µA and 57 µA in Silent mode.
3.3 Ground Pin (GND)
The IC is neutral on the LIN pin in the event of GND disconnection. It is able to handle a ground
shift up to 11.5% of V
S
.
3.4 Voltage Regulator Output Pin (VCC)
The internal 3.3V/5V voltage regulator is capable of driving loads with up to 50 mA, supplying
the microcontroller and other ICs on the PCB and is protected against overload by means of cur-
rent limitation and overtemperature shut-down. Furthermore, the output voltage is monitored
and will cause a reset signal at the NRES output pin if it drops below a defined threshold V
thun
.
3.5 Undervoltage Reset Output (NRES)
If the V
CC
voltage falls below the undervoltage detection threshold of V
thun
, NRES switches to
low after tres_f ( Figure 6-1 on page 11 ). Even if V
CC
= 0V the NRES stays low, because it is
internally driven from the V
S
voltage. If V
S
voltage ramps down, NRES stays low until V
S
< 1.5V
and then becomes highly resistant.
The implemented undervoltage delay keeps NRES low for t
Reset
= 4 ms after V
CC
reaches its
nominal value.
3.6 Bus Pin (LIN)
A low-side driver with internal current limitation and thermal shutdown as well as an internal
pull-up resistor according to LIN specification 2.0 is implemented. The voltage range is from
–27V to +40V. This pin exhibits no reverse current from the LIN bus to V
S
, even in the event of a
GND shift or V
Batt
disconnection. The LIN receiver thresholds are compatible with the LIN proto-
col specification.
The fall time (from recessive to dominant) and the rise time (from dominant to recessive) are
slope controlled.