8 block erase, 7 page erase – Rainbow Electronics AT45DB041E User Manual
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AT45DB041E [ADVANCE DATASHEET]
8783B–DFLASH–11/2012
6.7
Page Erase
The Page Erase command can be used to individually erase any page in the main memory array allowing the Buffer to
Main Memory Page Program without Built-In Erase command or the Main Memory Byte/Page Program through Buffer 1
command to be utilized at a later time.
To perform a Page Erase with the standard DataFlash page size (264 bytes), an opcode of 81h must be clocked into the
device followed by three address bytes comprised of four dummy bits, 11 page address bits (PA10 - PA0) that specify the
page in the main memory to be erased, and nine dummy bits.
To perform a Page Erase with the binary page size (256 bytes), an opcode of 81h must be clocked into the device
followed by three address bytes comprised of five dummy bits, 11 page address bits (A18 - A8) that specify the page in
the main memory to be erased, and eight dummy bits.
When a low-to-high transition occurs on the CS pin, the device will erase the selected page (the erased state is a
Logic 1). The erase operation is internally self-timed and should take place in a maximum time of t
PE
. During this time, the
RDY/BUSY
bit in the Status Register will indicate that the device is busy.
The device also incorporates an intelligent erase algorithm that can detect when a byte location fails to erase properly. If
an erase error arises, it will be indicated by the EPE bit in the Status Register.
6.8
Block Erase
The Block Erase command can be used to erase a block of eight pages at one time. This command is useful when
needing to pre-erase larger amounts of memory and is more efficient than issuing eight separate Page Erase
commands.
To perform a Block Erase with the standard DataFlash page size (264 bytes), an opcode of 50h must be clocked into the
device followed by three address bytes comprised of four dummy bits, eight page address bits (PA10 - PA3), and
12 dummy bits. The eight page address bits are used to specify which block of eight pages is to be erased.
To perform a Block Erase with the binary page size (256 bytes), an opcode of 50h must be clocked into the device
followed by three address bytes comprised of five dummy bits, eight page address bits (A18 - A11), and 11 dummy bits.
The eight page address bits are used to specify which block of eight pages is to be erased.
When a low-to-high transition occurs on the CS pin, the device will erase the selected block of eight pages. The erase
operation is internally self-timed and should take place in a maximum time of t
BE
. During this time, the RDY/BUSY
bit in
the Status Register will indicate that the device is busy.
The device also incorporates an intelligent erase algorithm that can detect when a byte location fails to erase properly. If
an erase error arises, it will be indicated by the EPE bit in the Status Register.
Table 6-1.
Block Erase Addressing
PA10/
A18
PA9/
A17
PA8/
A16
PA7/
A15
PA6/
A14
PA5/
A13
PA4/
A12
PA3/
A11
PA2/
A10
PA1/
A9
PA0/
A8
Block
0
0
0
0
0
0
0
0
X
X
X
0
0
0
0
0
0
0
0
1
X
X
X
1
0
0
0
0
0
0
1
0
X
X
X
2
0
0
0
0
0
0
1
1
X
X
X
3
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
1
1
1
1
1
1
0
0
X
X
X
252
1
1
1
1
1
1
0
1
X
X
X
253
1
1
1
1
1
1
1
0
X
X
X
254
1
1
1
1
1
1
1
1
X
X
X
255