9 sector erase, 10 chip erase – Rainbow Electronics AT45DB041E User Manual
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AT45DB041E [ADVANCE DATASHEET]
8783B–DFLASH–11/2012
6.9
Sector Erase
The Sector Erase command can be used to individually erase any sector in the main memory.
The main memory array is comprised of nine sectors, and only one sector can be erased at a time. To perform an erase
of Sector 0a or Sector 0b with the standard DataFlash page size (264 bytes), an opcode of 7Ch must be clocked into the
device followed by three address bytes comprised of four dummy bits, eight page address bits (PA10 - PA3), and
12 dummy bits. To perform a Sector 1-7 erase, an opcode of 7Ch must be clocked into the device followed by three
address bytes comprised of four dummy bits, three page address bits (PA10 - PA8), and 17 dummy bits.
To perform a Sector 0a or Sector 0b erase with the binary page size (256 bytes), an opcode of 7Ch must be clocked into
the device followed by three address bytes comprised of five dummy bits, eight page address bits (A18 - A11), and
11 dummy bits. To perform a Sector 1-7 erase, an opcode of 7Ch must be clocked into the device followed by three
dummy bits, three page address bits (A18 - A16), and 16 dummy bits.
The page address bits are used to specify any valid address location within the sector to be erased. When a
low-to high transition occurs on the CS pin, the device will erase the selected sector. The erase operation is internally
self-timed and should take place in a maximum time of t
SE
. During this time, the RDY/BUSY
bit in the Status Register will
indicate that the device is busy.
The device also incorporates an intelligent algorithm that can detect when a byte location fails to erase properly. If an
erase error arises, it will be indicated by the EPE bit in the Status Register.
Table 6-2.
Sector Erase Addressing
6.10 Chip Erase
The Chip Erase command allows the entire main memory array to be erased can be erased at one time.
To execute the Chip Erase command, a 4-byte command sequence of C7h, 94h, 80h, and 9Ah must be clocked into the
device. Since the entire memory array is to be erased, no address bytes need to be clocked into the device, and any data
clocked in after the opcode will be ignored. After the last bit of the opcode sequence has been clocked in, the CS pin
must be deasserted to start the erase process. The erase operation is internally self-timed and should take place in a
time of t
CE
. During this time, the RDY/BUSY bit in the Status Register will indicate that the device is busy.
The Chip Erase command will not affect sectors that are protected or locked down; the contents of those sectors will
remain unchanged. Only those sectors that are not protected or locked down will be erased.
The WP pin can be asserted while the device is erasing, but protection will not be activated until the internal erase cycle
completes.
PA10/
A18
PA9/
A17
PA8/
A16
PA7/
A15
PA6/
A14
PA5/
A13
PA4/
A12
PA3/
A11
PA2/
A10
PA1/
A9
PA0/
A8
Sector
0
0
0
0
0
0
0
0
X
X
X
0a
0
0
0
0
0
0
0
1
X
X
X
0b
0
0
1
X
X
X
X
X
X
X
X
1
0
1
0
X
X
X
X
X
X
X
X
2
0
1
1
X
X
X
X
X
X
X
X
3
1
0
0
X
X
X
X
X
X
X
X
4
1
0
1
X
X
X
X
X
X
X
X
5
1
1
0
X
X
X
X
X
X
X
X
6
1
1
1
X
X
X
X
X
X
X
X
7