Rainbow Electronics ATmega161L - Manual (Page 62)

62
ATmega161(L)
1228C–AVR–08/02
bit. When EERE has been set, the CPU is halted for four cycles before the next instruc-
tion is executed.
The user should poll the EEWE bit before starting the read operation. If a write operation
is in progress when new data or address is written to the EEPROM I/O Registers, the
write operation will be interrupted and the result is undefined.
An RC Oscillator is used to time EEPROM write access. The table below lists the typical
programming time listed for EEPROM access from CPU.
Note: 1. See “Typical Characteristics” on page 138 to find RC Oscillator frequency.
Prevent EEPROM
Corruption During periods of low V
CC
, the EEPROM data can be corrupted because the supply volt-
age is too low for the CPU and the EEPROM to operate properly. These issues are the
same as for board-level systems using the EEPROM, and the same design solutions
should be applied.
An EEPROM data corruption can be caused by two situations when the voltage is too
low. First, a regular write sequence to the EEPROM requires a minimum voltage to
operate correctly. Secondly, the CPU itself can execute instructions incorrectly if the
supply voltage for executing instructions is too low.
EEPROM data corruption can easily be avoided by following these design recommen-
dations (one is sufficient):
1. Keep the AVR RESET active (low) during periods of insufficient power supply
voltage. An external low V
CC
Reset Protection circuit can be applied.
2. Keep the AVR core in Power-down Sleep mode during periods of low V
CC
. This
will prevent the CPU from attempting to decode and execute instructions, effec-
tively protecting the EEPROM Registers from unintentional writes.
3. Store constants in Flash memory if the ability to change memory contents from
software is not required. Flash memory cannot be updated by the CPU unless
the boot loader software supports writing to the Flash and the Boot Lock bits are
configured so that writing to the Flash memory from the CPU is allowed. See
“Boot Loader Support” on page 110 for details.
Table 21. EEPROM Access Time from CPU“See “Typical Characteristics” on page 138
to find RC Oscillator frequency.” on page 62
(1)
Symbol
No. of RC
Oscillator Cycles
Min Programming
Time
Max Programming
Time
EEPROM write (from CPU) 2048 2.0 ms 3.4 ms