Rainbow Electronics DS1800 - Manual (Page 3)

DS1800
072095 3/13
button debounce is faster. These timing differences are
discussed in the section entitled “Push–button Inter-
face Control”. The state of this pin is determined only at
device power–up.
POWER–UP CONDITIONS
The position of the wipers of the DS1800 on power up
are internally set to position 127, which is the last posi-
tion before mute. The user then has the responsibility of
changing the wiper position to the desired attenuation/
gain levels.
Additionally, the serial port is stable and active within 10
microseconds. The contact closure control interface
inputs are active after 50 ms.
INTERFACE CONTROL OPTIONS
Control of the DS1800 is provided via two types of inter-
face ports. A 3–wire CPU control interface allows the
exact wiper positions of the potentiometers to be written
using two 8–bit words. A cascade output, C
OUT
, is pro-
vided when controlling multiple devices via one CPU or
when reading the wiper positions of each potentiometer.
The second interface is a contact closure interface that
allows push–buttons to control movement of the wiper
positions. Under push–button control no external
debounce or timing circuitry is needed. A block diagram
of the DS1800 is shown in Figure 1.
3–WIRE SERIAL INTERFACE CONTROL
CPU control of the DS1800 is accomplished using the
3–Wire serial port of the device. This interface drives an
internal control logic unit. Direct wiper positioning is
accomplished by using this port which consist of three
input signals: RST, CLK, and D.
The RST control signal is used to enable 3–wire serial
port write operations. The CLK terminal is an input that
provides synchronization for data I/O. Data is input bit
by bit via the D input signal pin.
The 3–Wire serial timing diagrams are provided in Fig-
ure 5. Serial port operation or activity begins with the
transition of the RST signal from a low–state to a high–
state. Once activated, data is clocked into the part on
the low to high transition of the CLK signal input. Data
input via the D terminal is transferred in order of the
desired potentiometer–0 wiper value, followed by the
potentiometer–1 wiper position value.
Two 8–bit values are used to store wiper position for
each potentiometer during powered conditions. These
8–bit values are written to a 16–bit I/O shift register. A
detailed diagram of the 16–bit I/O shift register is shown
in Figure 6.
Bits 0 through 7 are reserved for the positioning of
wiper–0 while bits 8 through 15 are reserved for control
of wiper–1. Bits 0 through 6 are used for actual wiper
positioning of potentiometer–0. Bit 7 is used to mute
potentiometer–0. If this bit is set to a “1”, the potentiom-
eter–0 wiper will be connected to the OUT0 end of the
resistor array regardless of the settings of bits 0 through
6.
Bits 8 through 15 are used for positioning the wiper of
potentiometer–1. Bits 8 through 14 control wiper posi-
tion on the resistor array. Bit 15 is used for muting poten-
tiometer–1. Bit 15, like bit 7, when set to “1” will mute
potentiometer 1, regardless of the settings of bits 8
through 14.
Data is transmitted LSB first starting with bit–0. A com-
plete transmission of 16 bits of data is required to insure
proper setting of each potentiometer’s wiper. An incom-
plete transmission may result in undesired wiper set-
tings.
Once the 16 bits of information has been transmitted
and the RST signal input transitions to a low–state, the
new wiper positions are loaded into the part.
PUSH–BUTTON INTERFACE CONTROL
The DS1800 can be configured to operate from contact
closure or push–button inputs. The push–button inputs
consist of signals P0A, P0G, P1A, P1G and MUTE.
P0A and P0G allow attenuation and gain control of the
input signal to potentiometer–0, while P1A and P1G
provide the same control for potentiometer–1. The
MUTE input provides a toggle control for muting the
potentiometers via pushbutton.
The P0A and P1A control inputs, based on the recom-
mended circuit configuration, are used to attenuate the
incoming signal by moving the wiper position towards
the OUTx terminals. The P0G and P1G control inputs