Jtag boundary-scan cell (bsc) testing, Bsc configuration for macrocell, Atf1502as(l) – Rainbow Electronics ATF1502ASL User Manual

Page 9

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ATF1502AS(L)

0995J–PLD–09/02

JTAG
Boundary-scan
Cell (BSC)
Testing

The ATF1502AS contains up to 32 I/O pins and four input pins, depending on the device type
and package type selected. Each input pin and I/O pin has its own boundary-scan cell (BSC)
in order to support boundary-scan testing as described in detail by IEEE Standard 1149.1. A
typical BSC consists of three capture registers or scan registers and up to two update regis-
ters. There are two types of BSCs, one for input or I/O pin, and one for the macrocells. The
BSCs in the device are chained together through the capture registers. Input to the capture
register chain is fed in from the TDI pin while the output is directed to the TDO pin. Capture
registers are used to capture active device data signals, to shift data in and out of the device
and to load data into the update registers. Control signals are generated internally by the
JTAG TAP controller. The BSC configuration for the input and I/O pins and macrocells is
shown below.

BSC
Configuration
for Input and I/O
Pins (Except
JTAG TAP Pins)

Note:

1. The ATF1502AS has a pull-up option on TMS and TDI pins. This feature is selected as a

design option.

BSC
Configuration
for Macrocell

0

1

0

1

D Q

D Q

Capture

DR

Update

DR

0

1

0

1

D Q

D Q

TDI

OUTJ

OEJ

Shift

Clock

Mode

TDO

BSC for I/O Pins and Macrocells

0

1

D

Q

TDI

CLOCK

TDO

Pin

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