Rainbow Electronics DS1602 - Manual (Page 3)

DS1602
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transfer. A clock cycle is a sequence of a rising edge followed by a falling edge. For write inputs, data
must be valid during the rising edge of the clock. Data bits are output on the falling edge of the clock
when data is being read. All data transfers terminate if the RST input is transitioned low and the DQ pin
goes to a high- impedance state. RST should only be transitioned low while the clock is high to avoid
disturbing the last bit of data. All data transfers must consist of 8 bits when transferring protocol only or
8 + 32 bits when reading or writing either counter. Data transfer is illustrated in Figure 3.
DATA INPUT
Following the 8-bit protocol that inputs write mode, 32 bits of data are written to the selected counter on
the rising edge of the next 32 CLK cycles. After 32 bits have been entered any additional CLK cycles will
be ignored until RST is transitioned low to end data transfer, and then high again to begin new data
transfer.
DATA OUTPUT
Following the eight CLK cycles that input read mode protocol, 32 bits of data will be output from the
selected counter on the next 32 CLK cycles. The first data bit to be transmitted from the selected 32-bit
counter occurs on the falling edge after the last bit of protocol is written. When transmitting data from the
selected 32-bit counter, RST must remain at high level as a transition to low level will terminate data
transfer. Data is driven out the DQ pin as long as CLK is low. When CLK is high the DQ pin is tristated.
CRYSTAL SELECTION
A standard 32.768kHz quartz crystal can be directly connected to the DS1602 via pins 1 and 2 (X1, X2).
The crystal selected for use should have a specified load capacitance (C
L
) of 6pF. For more information
on crystal selection and crystal layout considerations, please consult Application Note 58: Crystal
Considerations with Dallas Real-Time Clocks.
BATTERY SELECTION
The battery selected for use with the DS1602 should have an output voltage between 2.5V and 3.5V. A
lithium battery of 35mAh or greater will run the elapsed time counter for over 10 years in the absence of
power. Small lithium coin cell batteries produce both the proper output voltage and have the capacity to
supply the DS1602 for the useable lifetime of the equipment where they are installed.
PIN DESCRIPTIONS
Vcc, GND – DC power is provided to the device on these pins. V
CC
is the +5V input. When 5V is applied
within normal limits, the device is fully accessible and data can be written and read. When a 3V battery is
connected to the device and V
CC
is below 1.25 x V
BAT
, reads and writes are inhibited. As V
CC
falls below
V
BAT
the continuous counter is switched over to the external power supply (nominal 3.0V DC) at V
BAT
.
CLK (Serial Clock Input) – CLK is used to synchronize data movement on the serial interface.
DQ (Data Input/Output) – The DQ pin is the bidirectional data pin for the 3-wire interface.
RST (Reset) – The reset signal must be asserted high during a read or a write.
X1, X2 – Connections for a standard 32.768kHz quartz crystal. The internal oscillator is designed for
operation with a crystal having a specified load capacitance of 6pF. For more information on crystal
selection and crystal layout considerations, refer to Application Note 58: Crystal Considerations with