Rainbow Electronics MAX1635 User Manual
Page 20
MAX1630–MAX1635
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
20
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systems can multiply the R
ESR
value by a factor of 1.5
without hurting stability or transient response.
The output voltage ripple is usually dominated by the
filter capacitor’s ESR, and can be approximated as
I
RIPPLE
x R
ESR
. There is also a capacitive term, so the
full equation for ripple in continuous-conduction mode
is V
NOISE (p-p)
= I
RIPPLE
x [R
ESR
+ 1/(2 x
π
x f x
C
OUT
)]. In Idle Mode, the inductor current becomes
discontinuous, with high peaks and widely spaced
pulses, so the noise can actually be higher at light load
(compared to full load). In Idle Mode, calculate the out-
put ripple as follows:
Transformer Design
(for Auxiliary Outputs Only)
Buck-plus-flyback applications, sometimes called “cou-
pled-inductor” topologies, need a transformer to gener-
ate multiple output voltages. Performing the basic
electrical design is a simple task of calculating turns
ratios and adding the power delivered to the secondary
to calculate the current-sense resistor and primary
inductance. However, extremes of low input-output dif-
ferentials, widely different output loading levels, and
high turns ratios can complicate the design due to par-
asitic transformer parameters such as interwinding
capacitance, secondary resistance, and leakage
inductance. For examples of what is possible with real-
world transformers, see the Maximum Secondary
Current vs. Input Voltage graph in the
Typical
Operating Characteristics
section.
Power from the main and secondary outputs is com-
bined to get an equivalent current referred to the main
output voltage (see the
Inductor Value
section for para-
meter definitions). Set the current-sense resistor resis-
tor value at 80mV / I
TOTAL
.
P
TOTAL
= The sum of the output power from all outputs
I
TOTAL
= P
TOTAL
/ V
OUT
= The equivalent output cur-
rent referred to V
OUT
where: V
SEC
= the minimum required rectified sec-
ondary output voltage
V
FWD
= the forward drop across the secondary
rectifier
V
OUT(MIN)
= the
minimum
value of the main
output voltage (from the
Electrical
Characteristics
)
V
RECT
= the on-state voltage drop across the
synchronous rectifier MOSFET
V
SENSE
= the voltage drop across the sense
resistor
In positive-output applications, the transformer sec-
ondary return is often referred to the main output volt-
age, rather than to ground, to reduce the needed turns
ratio. In this case, the main output voltage must first be
subtracted from the secondary voltage to obtain V
SEC
.
Selecting Other Components
MOSFET Switches
The high-current N-channel MOSFETs must be logic-level
types with guaranteed on-resistance specifications at
V
GS
= 4.5V. Lower gate threshold specifications are bet-
ter (i.e., 2V max rather than 3V max). Drain-source break-
down voltage ratings must at least equal the maximum
input voltage, preferably with a 20% derating factor. The
best MOSFETs will have the lowest on-resistance per
nanocoulomb of gate charge. Multiplying R
DS(ON)
x Q
G
provides a good figure for comparing various MOSFETs.
Newer MOSFET process technologies with dense cell
structures generally perform best. The internal gate
drivers tolerate >100nC total gate charge, but 70nC is a
more practical upper limit to maintain best switching
times.
In high-current applications, MOSFET package power
dissipation often becomes a dominant design factor.
I
2
R power losses are the greatest heat contributor for
both high-side and low-side MOSFETs. I
2
R losses are
distributed between Q1 and Q2 according to duty fac-
tor (see the following equations). Generally, switching
losses affect only the upper MOSFET, since the
Schottky rectifier clamps the switching node in most
cases before the synchronous rectifier turns on. Gate-
charge losses are dissipated by the driver and don’t
heat the MOSFET. Calculate the temperature rise
according to package thermal-resistance specifications
to ensure that both MOSFETs are within their maximum
junction temperature at high ambient temperature. The
worst-case dissipation for the high-side MOSFET
occurs at both extremes of input voltage, and the
worst-case dissipation for the low-side MOSFET occurs
at maximum input voltage.
L(primary) =
V
(V
- V
)
V
x f x I
x LIR
Turns Ratio N =
V
+ V
V
+ V
+ V
OUT
IN(MAX)
OUT
IN(MAX)
TOTAL
SEC
FWD
OUT(MIN)
RECT
SENSE
V
=
0.02 x R
R
0.0003 x Lx 1 / V
1 / (V
- V
)
(R
) x C
NOISE(p-p)
ESR
SENSE
OUT
IN
OUT
SENSE
2
OUT
+
+
[
]