Rainbow Electronics MAX1635 - Manual (Page 22)

MAX1630–MAX1635
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
22 ______________________________________________________________________________________
Table 5. Low-Voltage Troubleshooting Chart
SYMPTOM
Sag or droop in V OUT under
step-load change
CONDITION
Low V IN -V OUT
differential, <1.5V
ROOT CAUSE
Limited inductor-current
slew rate per cycle.
SOLUTION
Increase bulk output capacitance
per formula (see
Low-Voltage
Operation section). Reduce inductor
value.
Low V IN -V OUT
differential, <1V
Maximum duty-cycle limits
exceeded.
Dropout voltage is too high
(V
OUT follows V IN as V IN
decreases)
Reduce operation to 200kHz.
Reduce MOSFET on-resistance and
coil DCR.
Low V IN -V OUT
differential,
V
IN < 1.3 x V OUT (main)
Not enough duty cycle left
to initiate forward-mode
operation. Small AC current
in primary can’t store ener-
gy for flyback operation.
Low V IN -V OUT
differential, <0.5V
Secondary output won’t
support a load
Reduce operation to 200kHz.
Reduce secondary impedances;
use a Schottky diode, if possible.
Stack secondary winding on the
main output.
Normal function of internal
low-dropout circuitry.
Unstable—jitters between
different duty factors and
frequencies
Increase the minimum input voltage
or ignore.
Low input voltage, <4.5V
VL output is so low that it
hits the VL UVLO threshold.
Low input voltage, <5V
Won’t start under load or
quits before battery is
completely dead Supply VL from an external source
other than V
IN , such as the system
+5V supply.
VL linear regulator is going
into dropout and isn’t provid-
ing good gate-drive levels.
Poor efficiency
Use a small 20mA Schottky diode
for boost diode D2. Supply VL from
an external source.
________________Applications Information
Heavy-Load Efficiency Considerations
The major efficiency-loss mechanisms under loads are,
in the usual order of importance:
•
P(I 2 R) = I 2 R losses
•
P(tran) = transition losses
•
P(gate) = gate-charge losses
•
P(diode) = diode-conduction losses
•
P(cap) = capacitor ESR losses
•
P(IC) = losses due to the IC’s operating supply
supply current
Inductor core losses are fairly low at heavy loads
because the inductor’s AC current component is small.
Therefore, they aren’t accounted for in this analysis.
Ferrite cores are preferred, especially at 300kHz, but
powdered cores, such as Kool-Mu, can work well.
where R DC is the DC resistance of the coil, R DS(ON) is
the MOSFET on-resistance, and R SENSE is the current-
sense resistor value. The R DS(ON) term assumes identi-
cal MOSFETs for the high-side and low-side switches,
because they time-share the inductor current. If the
MOSFETs aren’t identical, their losses can be estimat-
ed by averaging the losses according to duty factor.
where C RSS is the reverse transfer capacitance of the
high-side MOSFET (a data-sheet parameter), I GATE is the
DH gate-driver peak output current (1.5A typical), and
20ns is the rise/fall time of the DH driver (20ns typical).
P(gate) = qG x f x VL
where VL is the internal-logic-supply voltage (+5V), and qG
is the sum of the gate-charge values for low-side and high-
side switches. For matched MOSFETs, qG is twice the
data-sheet value of an individual MOSFET. If V
OUT is set to
less than 4.5V, replace VL in this equation with V BATT . In
this case, efficiency can be improved by connecting VL to
an efficient 5V source, such as the system +5V supply.
P(diode) = diode - conduction losses
= I x V x t x f
LOAD FWD D
PD(tran) = transition loss = V x I x f x
3
2
x
(V x C / I ) + 20ns
IN LOAD
IN RSS GATE
[ ]
Efficiency = P / P x 100%
= P / (P + P ) x 100%
P = P(I R) + P(tran) + P(gate) +
P(diode) + P(cap) + P(IC)
P = (I R) = (I ) x (R + R + R )
OUT IN
OUT OUT TOTAL
TOTAL
2
2
LOAD
2
DC DS(ON) SENSE