Rainbow Electronics MAX3625В - Manual (Page 3)

MAX3625B
Low-Jitter, Precision Clock
Generator with Three Outputs
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ELECTRICAL CHARACTERISTICS (continued)
(V CC = +3.0V to +3.6V, T A = -40°C to +85°C, unless otherwise noted. Typical values are at V CC = +3.3V, T A = +25°C, unless other-
wise noted.) (Notes 1, 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
REF_IN SPECIFICATIONS (Input DC- or AC-Coupled)
PLL enabled 24.8 27.0
Reference Clock Frequency
PLL bypassed 320
MHz
Input-Voltage High V IH 2.0 V
Input-Voltage Low V IL 0.8 V
Input High Current I IH V IN = V CC 240 μA
Input Low Current I
IL
V
IN
= 0V -240 μA
Reference Clock Duty Cycle PLL enabled 30 70 %
Input Capacitance 2.5 pF
CLOCK OUTPUT AC SPECIFICATIONS
VCO Frequency Range 620 648 MHz
12kHz to 20MHz 0.36 1.0
Random Jitter (Note 5) RJ RMS
1.875MHz to 20MHz 0.14
ps RMS
Spurs Induced by Power-Supply
Noise
(Notes 6, 7, 8) -60 dBc
Deterministic Jitter Induced by
Power-Supply Noise
(Note 9) 5.6 ps P-P
Nonharmonic and Subharmonic
Spurs
-70 dBc
Output Skew Between any output pair 5 ps
f = 1kHz -124
f = 10kHz -127
f = 100kHz -131
f = 1MHz -145
Clock Output SSB Phase Noise
at 125MHz (Note 10)
f > 10MHz -153
dBc/Hz
Note 1: A series resistor of up to 10.5 Ω is allowed between V
CC and V CCA for filtering supply noise when system power-supply
tolerance is V CC = 3.3V ±5%. See Figure 1.
Note 2: LVPECL outputs guaranteed up to 320MHz.
Note 3: All outputs enabled and unloaded.
Note 4: Measured with a crystal (see Table 4) or an AC-coupled, 50% duty-cycle signal on REF_IN.
Note 5: Measured with crystal source, see Table 4.
Note 6: Measured using setup shown in Figure 1.
Note 7: Measured with 40mV P-P , 100kHz sinusoidal signal on the supply.
Note 8: Measured at 156.25MHz output.
Note 9: Calculated based on measured spurs induced by power-supply noise (refer to Application Note 4461: HFAN-04.5.5:
Characterizing Power-Supply Noise Rejection in PLL Clock Synthesizers).
Note 10: Measured with 25MHz crystal or 25MHz reference clock at REF_IN with a slew rate of 0.5V/ns or greater.