Chip information – Rainbow Electronics MAX3625В User Manual
Page 9
Interface Models
Figures 6 and 7 show examples of interface models.
Layout Considerations
The inputs and outputs are critical paths for the
MAX3625B, and care should be taken to minimize dis-
continuities on these transmission lines. Here are some
suggestions for maximizing the MAX3625B’s perfor-
mance:
• An uninterrupted ground plane should be posi-
tioned beneath the clock I/Os.
• Supply and ground pin vias should be placed
close to the IC and the input/output interfaces to
allow a return current path to the MAX3625B and
the receive devices.
• Supply decoupling capacitors should be placed
close to the MAX3625B supply pins.
• Maintain 100
Ω differential (or 50Ω single-ended)
transmission line impedance out of the MAX3625B.
• Use good high-frequency layout techniques and
multilayer boards with an uninterrupted ground
plane to minimize EMI and crosstalk.
• The 24-pin TSSOP-EP package features an
exposed pad (EP), which provides a low-resis-
tance thermal path for heat removal from the IC,
and must be connected to the circuit board ground
plane for proper operation.
Refer to the MAX3625B Evaluation Kit for more information.
Chip Information
TRANSISTOR COUNT: 10,840
PROCESS: BiCMOS
MAX3625B
Low-Jitter, Precision Clock
Generator with Three Outputs
_______________________________________________________________________________________
9
ESD
STRUCTURES
Qx
V
CC
Qx
Figure 7. Simplified LVPECL Output Circuit Schematic
14.5k
Ω
V
B
ESD
STRUCTURES
V
B
REF_IN
V
B
= 1.4V
V
CC
V
CC
Figure 6. Simplified REF_IN Pin Circuit Schematic