Pin description detailed description – Rainbow Electronics MAX3746 User Manual

Page 7

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MAX3746

Low-Power, 622Mbps to 3.2Gbps

Limiting Amplifier

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7

PIN

NAME

FUNCTION

1, 4

V

CC1

Supply Voltage

2

IN+

Noninverted Input Signal, CML

3

IN-

Inverted Input Signal, CML

5

TH

Loss-of-Signal Threshold Pin. Resistor to ground (R

TH

) sets the LOS threshold.

Connecting this pin to V

CC

disables the LOS circuitry and reduces power consumption.

6

DISABLE

Disable Input, CMOS/TTL. The data outputs are held static when this pin is asserted high. The LOS
function remains active when the outputs are disabled.

7

LOS

Noninverted Loss-of-Signal Output. LOS is asserted high when the signal drops below the assert
threshold set by the TH input. The output is open collector.

8, 16

GND

Supply Ground

9

OUTPOL

Output Polarity Control. Connect to GND for an inversion of polarity through the limiting amplifier and
connect to V

CC

for normal operation. See Table 1 for all settings.

10

OUT-

Inverted Data Output, CML

11

OUT+

Noninverted Data Output, CML

12

V

CC2

Output Supply

13

RSSI

Received-Signal-Strength Indicator. This current output can be used to obtain a ground-referenced
voltage proportional to the photodiode current with the MAX3744 by connecting an external resistor
between this pin and GND.

14,15

N.C.

No Connection. Leave open.

EP

EXPOSED

PAD

Connect the exposed pad to board ground for optimal electrical and thermal performance.

Pin Description

Detailed Description

The MAX3746 limiting amplifier consists of an input
buffer, a multistage amplifier, offset-correction circuitry,
an output buffer, power-detection circuitry, and signal-
detect circuitry (see the Functional Diagram).

Input Buffer

The input buffer is shown in Figure 3. It provides 50Ω ter-
mination for each input signal IN+ and IN-. The MAX3746
can be DC- or AC-coupled to a TIA (TIA output offset
degrades receiver performance if DC-coupled). The
CML input buffer is optimized for the MAX3744/
MAX3724 TIA.

Gain Stage

The high-bandwidth multistage amplifier provides
approximately 60dB of gain.

Offset Correction Loop

The MAX3746 is susceptible to DC offsets in the signal
path because it has high gain. In communication sys-
tems using NRZ data with a 50% duty cycle, pulse-
width distortion present in the signal, or generated in
the transimpedance amplifier, appears as an input off-
set and is reduced by the offset correction loop.

CML Output Buffer

The MAX3746 limiting amplifier’s CML output provides
high tolerance to impedance mismatches and inductive
connectors. The OUTPOL setting programs the output
current. Connecting the DISABLE pin to V

CC

disables

the output. If the LOS pin is connected to the DISABLE
pin, the outputs OUT+ and OUT- are at a static voltage
(squelch) whenever the input signal level drops below
the LOS threshold. The output common mode remains
constant when the part is disabled. The output buffer
can be AC- or DC-coupled to the load (Figure 4).

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