Asus E500-PV - Manual (Page 60)

ASUS CUV4X User’s Manual 60
4. BIOS SETUP
4. BIOS SETUP
Chip Configuration
SDRAM Configuration [By SPD]
This sets the optimal timings for items 2–5, depending on the memory mod-
ules that you are using. Default setting is [By SPD], which configures items
2–5 by reading the contents in the SPD (Serial Presence Detect) device. The
EEPROM on the memory module stores critical parameter information about
the module, such as memory type, size, speed, voltage interface, and mod-
ule banks. Configuration options: [User Define] [7ns (143MHz)] [8ns
(125MHz)] [By SPD]
SDRAM CAS Latency
This controls the latency between the SDRAM read command and the
time that the data actually becomes available. NOTE: This field will only
be displayed when SDRAM Configuration is set to [User Define].
SDRAM RAS Precharge Time
This controls the idle clocks after issuing a precharge command to the
SDRAM. NOTE: This field will only be displayed when SDRAM Con-
figuration is set to [User Define].
SDRAM RAS to CAS Delay
This controls the latency between the SDRAM active command and the
read/write command. NOTE: This field will only be displayed when
SDRAM Configuration is set to [User Define].
SDRAM Active to Precharge Time
To make changes to this field, the SDRAM Configuration field must be
set to [User Define].
4.4.1 Chip Configuration
(Scroll down to see more items as shown here.)