Atec Agilent-81100 Series - Manual (Page 9)

Data Sheet 81100 Family of Pulse Pattern Generators
Level/Pulse Performance Characteristics
Level specifications are valid after a 30 ns typical settling time (50 Ω into 50 Ω terminated to ground).
Sequencing: A sequence is a succession
of segments. One outer loop running once
or continuous, and one nested loop can be
applied. The nested loop can be set from
1 to 2 ^ 20 repetitions.
Segment: The memory can be divided into
maximal 4 segments.
Segment length resolution: This is the
resolution for which the segment can be
set dependent on the maximum data rate.
See Table 1.
Limit: Programmable high and low levels
can be limited to protect the device-under-
test.
Segment types: Pattern, PRBS, high
and low segments ( “0” or “1” levels
segments selectable).
Note: If one channel is set to PRBS the
other channel can only be high or low
segments, or PRBS type.
Random pattern: PRBS 2 ^ n - 1,
n = 7,8,...,15 (CCITT 0.151).
Level parameters: Voltage or current, high
and low level, or offset and amplitude.
Pattern and sequencing
Pattern length: 65504 bit/channel. If
PRBS is used: (65503-RBLength).
Pattern formats: NRZ (non-return-to-zero),
DNRZ (delayed non-return-to-zero), RZ
(return-to-zero) and R1 (return-to-one) can
be selected (see Figure 1).
On/off: Relays connect/disconnect
output (HiZ).
9
Segment length resolution trade-offs
Required segment
length resolution
1
Maximum data
rate, Mbits/s
1 bit 41.67
2 bits 83.88
4 bits 166.67
8 bits 333.33
16 bits 660
1. The minimum length in the first segment of a nested
loop is two times that of the segment length resolution.
Mainframe
Output module 81130A
81131A (400 MHz) 81130A
81132 A (660 MHz)
Amplitude 0.10 Vpp to 3.80 Vpp 0.10 Vpp to 2.50 Vpp
Level
• Window
-2.00 V to +3.80 V -2 .00 V to +3.00 V
• Accuracy ± (5% +150 mV) ± (5% +150 mV)
• Resolution 3 digits (10 mV best case) 3 digits (10 mV best case)
Output impedance 50 Ω ± 1% typ. 50 Ω ± 5% typ.
Max. external voltage -2.2 to +5.5V -2.0 to +4.0 V
Short circuit current -80 mA to +152 mA. -80 mA to +120 mA
Baseline noise 4 mV RMS typ. 8 mV RMS typ.
Overshoot/preshoot/ringing ± (5% + 50 mV) of amplitude typ. ± (5% + 100 mV) of amplitude typ.
Width is a multiple
of clock periods.
Width and delay can
be set as required.
Width and delay can
be set as required.
The signal can be
delayed as required.
Output pattern formats
Non-return-to-zero
1 bit period
1
R1
RZ
DNRZ
NRZ
Return-to-one
Return-to-zero
Delayed non-return-to-zero
1 2 1