Teledyne LeCroy PXD Series - Manual (Page 40)

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ISSUED: March 2003 901217-01
PXD Series Digitizer
TRIGGER SYSTEM
Modes: Normal, Auto, Single, and Stop
Slope: Positive, Negative
Coupling: DC, AC, LFREJ, HFREJ
AC Cutoff (low freq.): 7.5 Hz (typical)
HFREJ, LFREJ Cutoff: 50 kHz typical (6 dB/octave)
TRIGGER DELAY
Pre-Trigger Recording: 0 –100% of horizontal full scale (adjustable in 1% increments)
Post-Trigger Delay: 0 –10,000 divisions (adjustable in 0.1 division increments)
Sources: All data channels, EXT (Slope, level, and coupling are unique for each source. PXI triggering
capabilities are described below.)
EXTERNAL TRIGGER
Range: ±0.5 V (± 2.5 V with Ext/5 selected)
Input Impedance: 50 ohms ±1.5%, 1 Mohms ±3% || 20 pF ±10%
Maximum Input:
Z
in
= 50 ohms, 5 V
rms
(including DC)
Z
in
= 1 Mohms, 100 V (DC + pk AC, f <= 5 kHz)
Input Connector: BNC
Trigger Outputs: PXI (see below)
MULTI-MODULE SYNCHRONIZATION
The PXD digitizers support PXI extensions to the PCI bus for the following backplane clock and trigger
capabilities:
• External clock input for module synchronization to the 10 MHz TTL clock provided by the PXI backplane
(PXI_CLK10).
• Trigger inputs to support an asynchronous low skew (1–5 ns) trigger source broadcast on the PXI star
trigger bus.
• Asynchronous trigger I/O to support a single-line broadcast on the PXI trigger bus. The trigger input may
come from an external source, or from a digitizer module. Digitizer modules provide a tri-stated output to
support this mode, with high impedance guaranteed on power-up.
Software Compatibility:
The PXD hardware is compatible with the following software environments:
Operating Systems: Windows 2000/XP