Ad9843a, Timing specifications, Warning – Analog Devices AD9843A User Manual

Page 5

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AD9843A

–5–

REV. 0

TIMING SPECIFICATIONS

Parameter

Symbol

Min

Typ

Max

Unit

SAMPLE CLOCKS

DATACLK, SHP, SHD Clock Period

t

CONV

48

50

ns

DATACLK High/Low Pulsewidth

t

ADC

20

25

ns

SHP Pulsewidth

t

SHP

7

12.5

ns

SHD Pulsewidth

t

SHD

7

12.5

ns

CLPDM Pulsewidth

t

CDM

4

10

Pixels

CLPOB Pulsewidth

1

t

COB

2

20

Pixels

SHP Rising Edge to SHD Falling Edge

t

S1

0

12.5

ns

SHP Rising Edge to SHD Rising Edge

t

S2

20

25

ns

Internal Clock Delay

t

ID

3.0

ns

Inhibited Clock Period

t

INH

10

ns

DATA OUTPUTS

Output Delay

t

OD

14.5

16

ns

Output Hold Time

t

H

7.0

7.6

ns

Pipeline Delay

9

Cycles

SERIAL INTERFACE

Maximum SCK Frequency

f

SCLK

10

MHz

SL to SCK Setup Time

t

LS

10

ns

SCK to SL Hold Time

t

LH

10

ns

SDATA Valid to SCK Rising Edge Setup

t

DS

10

ns

SCK Falling Edge to SDATA Valid Hold

t

DH

10

ns

SCK Falling Edge to SDATA Valid Read

t

DV

10

ns

NOTES

1

Minimum CLPOB pulsewidth is for functional operation only. Wider typical pulses are recommended to achieve low noise clamp performance.

Specifications subject to change without notice.

CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD9843A features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.

(C

L

= 20 pF, f

SAMP

= 20 MHz, CCD-Mode Timing in Figures 5 and 6, AUX-Mode Timing in Figure 7.

Serial Timing in Figures 8–10.)

ABSOLUTE MAXIMUM RATINGS

With
Respect

Parameter

To

Min

Max

Unit

AVDD1, AVDD2

AVSS

–0.3

+3.9

V

DVDD1, DVDD2

DVSS

–0.3

+3.9

V

DRVDD

DRVSS

–0.3

+3.9

V

Digital Outputs

DRVSS

–0.3

DRVDD + 0.3

V

SHP, SHD, DATACLK

DVSS

–0.3

DVDD + 0.3

V

CLPOB, CLPDM, PBLK

DVSS

–0.3

DVDD + 0.3

V

SCK, SL, SDATA

DVSS

–0.3

DVDD + 0.3

V

VRT, VRB, CMLEVEL

AVSS

–0.3

AVDD + 0.3

V

BYP1-4, CCDIN

AVSS

–0.3

AVDD + 0.3

V

Junction Temperature

150

°C

Lead Temperature

300

°C

(10 sec)

ORDERING GUIDE

Temperature

Package

Package

Model

Range

Description

Option

AD9843AJST –20

°C to +85°C

Thin Plastic

ST-48

Quad Flatpack
(LQFP)

THERMAL CHARACTERISTICS
Thermal Resistance
48-Lead LQFP Package

θ

JA

= 92

°C

WARNING!

ESD SENSITIVE DEVICE

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