Table 5.1: pci slot voltage setting (jp2), Table 5.2: clear cmos (jp3), Table 5.3: lvds voltage setting (jp5) – Advantech PPC-175T User Manual
Page 47: Table 5.1, Pci slot voltage setting (jp2), Table 5.2, Clear cmos (jp3), Table 5.3, Lvds voltage setting (jp5), Chapter 5 jumpers & c onnectors
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PPC-175T User Manual
Chapter 5
Jumpers
&
C
onnectors
5.1.2.1
PCI slot voltage setting (JP2)
The panel PC supports 5V and 3.3V PCI_VIO slot voltages. The default voltage is
3.3V (closed pins 1-2). 5V may be selected by closing jumpers 2-3.
5.1.2.2
Clear CMOS (JP3)
This jumper erases the CMOS data and resets the system BIOS information.
5.1.2.3
LVDS voltage setting (JP5)
The panel PC supports 5V and 3.3V LVDS voltages. The default voltage is 3.3V
(closed pins 1-2). 5V may be selected by closing jumpers 2-3.
Table 5.1: PCI slot voltage setting (JP2)
3.3V (default)
5V
Table 5.2: Clear CMOS (JP3)
Normal operation (default)
Clear CMOS
Table 5.3: LVDS voltage setting (JP5)
3.3V (default)
5V
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
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