Cirrus Logic CS5463 - Manual (Page 43)

CS5463
DS678F3 43
VA+ VD+
0.1 µF 470 µF
1k 
235 nF
500 
R 1 R 2
10 
14
VIN+
9
VIN-
IIN-
10
16
15
IIN+
PFMON
CPUCLK
XOUT
XIN
Optional
Clock
Source
RESET
17
2
1
24
CS
SDI
SDO
SCLK
INT
0.1 µF
VREFIN
12
VREFOUT
11
DGND
13 4
3
4.096 MHz
0.1 µF
L 1 L
2
10 k  5 k 
R
I+
R
I-
R
V-
Serial
Data
Interface
19
7
23
6
5
20
ISOL
ATION
22
21
Mech. Counter
Stepper Motor
or
R
Burden
1k 
1k 
240 VAC
CS5463
Note:
Indicates common (floating) return.
C
Vdiff
C
I+
C
V+
C
Idiff
E1
AGND
E2
Figure 21. Typical Connection Diagram (Single-phase, 3-wire – No Neutral Available)