5 register 2, Table 5. register 2 bit definitions, Cs6422 – Cirrus Logic CS6422 User Manual

Page 19

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CS6422

19

3.5

Register 2

b15

b14

b13

b12

b11

b10

b9

b8

b7

b6

b5

b4

b3

b2

b1

b0

RHDet

RSThd

NseRmp

HDly

HHold TDSRmp RDSRmp

IdlTx

0

1

0

0

00

00

00

00

0

0

0

0

0

0

0

4

Bits

Name

Function

Word

Operation

15-14

RHDet

Rx Half-duplex Detection threshold

00*

01
10

11

6 dB
9 dB

12 dB

reserved

13-12

RSThd

Rx Suppression Threshold

00*

01
10

11

6 dB
9 dB

12 dB

reserved

11-10

NseRmp

Noise estimator Ramp rate

00*

01
10

11

3 dB/s
6 dB/s

12 dB/s

reserved

9-8

HDly

half-duplex Holdover Delay

00*

01
10

11

200 ms
100 ms
150 ms

reserved

7

HHold

Hold in half-duplex on Howl

0*

1

disable HHold

enable HHold

6

TDSRmp

Tx Double-talk Suppression Ramp rate

0*

1

slow

normal

5

RDSRmp

Rx Double-talk Suppression Ramp rate

0*

1

slow

normal

4

IdlTx

half-duplex Idle return-to-Transmit

0*

1

disable IdlTx

enable IdlTx

* Denotes reset value

Table 5. Register 2 Bit Definitions

CS6422

DS295F1

19

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