Figure 9. serial audio input, no pll, src enabled, Figure 10. aes3 input, src enabled, Figure 8 – Cirrus Logic CS8420 User Manual
Page 16: Show, Figure 9, Figure 10, Figure 11, Shows the same data flow as, Figure 12, Figure 13
16
DS245F4
CS8420
Figure 8. Serial Audio Input, using PLL, SRC Enabled
Figure 9. Serial Audio Input, No PLL, SRC Enabled
Serial
Audio
Input
AES3
Encoder
& Driver
Serial
Audio
Output
Sample
Rate
Converter
ILRCK
ISCLK
SDIN
OLRCK
OSCLK
SDOUT
TXP
TXN
PLL
RMCK
OMCK
TXD1-0:
SPD1-0:
SRCD:
OUTC:
INC:
RXD1-0:
00
00
0
0
0
00
Clock Source Control Bits
Data Flow Control Bits
Serial
Audio
Input
AES3
Encoder
& Driver
Serial
Audio
Output
Sample
Rate
Converter
ILRCK
ISCLK
SDIN
OLRCK
OSCLK
SDOUT
TXP
TXN
RMCK
OMCK
TXD1-0:
SPD1-0:
SRCD:
OUTC:
INC:
RXD1-0:
00
00
0
0
0
10
Clock Source Control Bits
Data Flow Control Bits
AES3
Encoder
& Driver
Serial
Audio
Output
Sample
Rate
Converter
OLRCK
OSCLK
SDOUT
TXP
TXN
PLL
RMCK
OMCK
TXD1-0:
SPD1-0:
SRCD:
OUTC:
INC:
RXD1-0:
00
00
1
0
0
01
Clock Source Control Bits
Data Flow Control Bits
AES3
Rx &
Decode
RXP
RXN
Serial
Audio
Input
AES3
Encoder
& Driver
Serial
Audio
Output
Sample
Rate
Converter
ILRCK
ISCLK
SDIN
OLRCK
OSCLK
SDOUT
TXP
TXN
PLL
RMCK OMCK
TXD1-0:
SPD1-0:
SRCD:
OUTC:
INC:
RXD1-0:
00
00
0
0
0
01
Clock Source Control Bits
Data Flow Control Bits
AES3
Rx
RXP
RXN
Figure 10. AES3 Input, SRC Enabled
Figure 11. Serial Audio Input, AES3 Input Clock Source,
Figure 12. Serial Audio Input, SRC Output Clocked by
AES3 Recovered Clock
Figure 13. AES3 Input, SRC to Serial Audio Output, Serial
Audio Input to AES3 Out
AES3
Encoder
& Driver
Serial
Audio
Output
Sample
Rate
Converter
TXP
TXN
PLL
RMCK
OMCK
TXD1-0:
SPD1-0:
SRCD:
OUTC:
INC:
RXD1-0:
01
00
1
0
0
01
Clock Source Control Bits
Data Flow Control Bits
AES3
Rx &
Decode
RXP
RXN
Serial
Audio
Input
OLRCK
OSCLK
SDOUT
ILRCK
ISCLK
SDIN
Serial
Audio
Input
AES3
Encoder
& Driver
Serial
Audio
Output
Sample
Rate
Converter
ILRCK
ISCLK
SDIN
OLRCK
OSCLK
SDOUT
TXP
TXN
PLL
RMCK
OMCK
TXD1-0:
SPD1-0:
SRCD:
OUTC:
INC:
RXD1-0:
00
00
0
1
1
01
Clock Source Control Bits
Data Flow Control Bits
AES3
Rx
RXP RXN